[llvm] dcd097c - Add IIT_V6 to support 6-element vectors in intrinsics. (#88196)

via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 12 10:16:03 PDT 2024


Author: Stanislav Mekhanoshin
Date: 2024-04-12T10:15:59-07:00
New Revision: dcd097c475163b9bd41ff009a9157e86c6f2f171

URL: https://github.com/llvm/llvm-project/commit/dcd097c475163b9bd41ff009a9157e86c6f2f171
DIFF: https://github.com/llvm/llvm-project/commit/dcd097c475163b9bd41ff009a9157e86c6f2f171.diff

LOG: Add IIT_V6 to support 6-element vectors in intrinsics. (#88196)

Needed for the future patch.

Added: 
    

Modified: 
    llvm/include/llvm/IR/Intrinsics.td
    llvm/lib/IR/Function.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index f0723a633f0fc5..bdd8465883fcff 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -319,6 +319,7 @@ def IIT_FUNCREF : IIT_VT<funcref, 55>;
 def IIT_I2 : IIT_Int<2, 57>;
 def IIT_I4 : IIT_Int<4, 58>;
 def IIT_AARCH64_SVCOUNT : IIT_VT<aarch64svcount, 59>;
+def IIT_V6 : IIT_Vec<6, 60>;
 }
 
 defvar IIT_all_FixedTypes = !filter(iit, IIT_all,

diff  --git a/llvm/lib/IR/Function.cpp b/llvm/lib/IR/Function.cpp
index b5fda9bb3d129a..96953ac49c19b4 100644
--- a/llvm/lib/IR/Function.cpp
+++ b/llvm/lib/IR/Function.cpp
@@ -1172,6 +1172,10 @@ static void DecodeIITType(unsigned &NextElt, ArrayRef<unsigned char> Infos,
     OutputTable.push_back(IITDescriptor::getVector(4, IsScalableVector));
     DecodeIITType(NextElt, Infos, Info, OutputTable);
     return;
+  case IIT_V6:
+    OutputTable.push_back(IITDescriptor::getVector(6, IsScalableVector));
+    DecodeIITType(NextElt, Infos, Info, OutputTable);
+    return;
   case IIT_V8:
     OutputTable.push_back(IITDescriptor::getVector(8, IsScalableVector));
     DecodeIITType(NextElt, Infos, Info, OutputTable);


        


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