[llvm] [SelectionDAG] Verify SPLAT_VECTOR nodes when they are created. (PR #88305)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 12 09:03:24 PDT 2024


https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/88305

>From f0913a81e6fadc30b59022614cb1b35416a52ac0 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 10 Apr 2024 11:20:42 -0700
Subject: [PATCH 1/2] [SelectionDAG] Verify SPLAT_VECTOR nodes when they are
 created.

This applies the same rules we have for the scalar operands of
a BUILD_VECTOR where the scalar type must match the element type
or for integer vectors we allow the scalar type to be larger than
the element type. Hexagon uses i32 for an FP zero vector so we allow
that as an exception.
---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 1dd0fa49a460f8..ec0250d15b2f9a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -6020,6 +6020,17 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
     if (N1.getValueType().getScalarType() == MVT::i1)
       return getNode(ISD::VECREDUCE_AND, DL, VT, N1);
     break;
+  case ISD::SPLAT_VECTOR:
+    assert(VT.isVector() && "Wrong return type!");
+    // FIXME: Hexagon uses i32 scalar for a floating point zero vector so allow
+    // that for now.
+    assert((VT.getVectorElementType() == N1.getValueType() ||
+            (!VT.isInteger() && N1.getValueType() == MVT::i32) ||
+            (VT.getVectorElementType().isInteger() &&
+             N1.getValueType().isInteger() &&
+             VT.getVectorElementType().bitsLE(N1.getValueType()))) &&
+           "Wrong operand type!");
+    break;
   }
 
   SDNode *N;

>From 054d2c01ad062d07b43e5f936b13870397a11675 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 12 Apr 2024 09:03:04 -0700
Subject: [PATCH 2/2] fixup! Use isFloatingPoint.

---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index ec0250d15b2f9a..bbebc682d28e81 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -6025,7 +6025,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
     // FIXME: Hexagon uses i32 scalar for a floating point zero vector so allow
     // that for now.
     assert((VT.getVectorElementType() == N1.getValueType() ||
-            (!VT.isInteger() && N1.getValueType() == MVT::i32) ||
+            (VT.isFloatingPoint() && N1.getValueType() == MVT::i32) ||
             (VT.getVectorElementType().isInteger() &&
              N1.getValueType().isInteger() &&
              VT.getVectorElementType().bitsLE(N1.getValueType()))) &&



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