[llvm] Base with add like constant offset (PR #88493)

[via llvm-commits]

https://github.com/fengfeng09 created https://github.com/llvm/llvm-project/pull/88493

Or-disjoint application.

>From 306ae56e117fbb20e46a6ced4a4d6aa7a6ea0066 Mon Sep 17 00:00:00 2001
From: "feng.feng" <feng.feng at iluvatar.com>
Date: Fri, 12 Apr 2024 11:06:35 +0800
Subject: [PATCH 1/2] Precommit test for refine isBaseWithConstantOffset. NFC

Signed-off-by: feng.feng <feng.feng at iluvatar.com>
---
 .../AVR/base-with-add-like-constant-offset.ll | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 llvm/test/CodeGen/AVR/base-with-add-like-constant-offset.ll

diff --git a/llvm/test/CodeGen/AVR/base-with-add-like-constant-offset.ll b/llvm/test/CodeGen/AVR/base-with-add-like-constant-offset.ll
new file mode 100644
index 00000000000000..28f93662a7b186
--- /dev/null
+++ b/llvm/test/CodeGen/AVR/base-with-add-like-constant-offset.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc -mtriple=avr %s -start-before=avr-isel -o - -stop-after=avr-isel | FileCheck %s
+
+define void @test(i16 %x, ptr addrspace(1) %o) {
+  ; CHECK-LABEL: name: test
+  ; CHECK: bb.0 (%ir-block.0):
+  ; CHECK-NEXT:   liveins: $r25r24, $r23r22
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:dldregs = COPY $r23r22
+  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:dregs = COPY $r25r24
+  ; CHECK-NEXT:   [[ORIWRdK:%[0-9]+]]:dldregs = ORIWRdK [[COPY]], 10, implicit-def dead $sreg
+  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:ptrdispregs = COPY [[ORIWRdK]]
+  ; CHECK-NEXT:   STWPtrRr killed [[COPY2]], [[COPY1]] :: (store (s16) into %ir.addr, align 1, addrspace 1)
+  ; CHECK-NEXT:   RET implicit $r1
+  %int = ptrtoint ptr addrspace(1) %o to i16
+  %or = or disjoint i16 %int, 10
+  %addr = inttoptr i16 %or to ptr addrspace(1)
+  store i16 %x, ptr addrspace(1) %addr
+  ret void
+}
+

>From fa99586ac5bb6b38ab31fb70f625c7d24468d643 Mon Sep 17 00:00:00 2001
From: "feng.feng" <feng.feng at iluvatar.com>
Date: Fri, 12 Apr 2024 17:51:05 +0800
Subject: [PATCH 2/2] [SelectionDAG] Disjoint Or could be also constant offset.

If the addr base of a Load/Store Inst is an Or-disjoint with a constant,
it could be selected to an MI with constans offset if the target have.

Signed-off-by: feng.feng <feng.feng at iluvatar.com>
---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp             | 3 +++
 .../test/CodeGen/AVR/base-with-add-like-constant-offset.ll | 7 +++----
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 1dd0fa49a460f8..67feb47fef076f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5191,6 +5191,9 @@ bool SelectionDAG::isADDLike(SDValue Op) const {
 }
 
 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
+  if (isADDLike(Op) && isa<ConstantSDNode>(Op.getOperand(1)))
+    return true;
+
   if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
       !isa<ConstantSDNode>(Op.getOperand(1)))
     return false;
diff --git a/llvm/test/CodeGen/AVR/base-with-add-like-constant-offset.ll b/llvm/test/CodeGen/AVR/base-with-add-like-constant-offset.ll
index 28f93662a7b186..6077f71b5efe06 100644
--- a/llvm/test/CodeGen/AVR/base-with-add-like-constant-offset.ll
+++ b/llvm/test/CodeGen/AVR/base-with-add-like-constant-offset.ll
@@ -6,11 +6,10 @@ define void @test(i16 %x, ptr addrspace(1) %o) {
   ; CHECK: bb.0 (%ir-block.0):
   ; CHECK-NEXT:   liveins: $r25r24, $r23r22
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:dldregs = COPY $r23r22
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:dregs = COPY $r23r22
   ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:dregs = COPY $r25r24
-  ; CHECK-NEXT:   [[ORIWRdK:%[0-9]+]]:dldregs = ORIWRdK [[COPY]], 10, implicit-def dead $sreg
-  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:ptrdispregs = COPY [[ORIWRdK]]
-  ; CHECK-NEXT:   STWPtrRr killed [[COPY2]], [[COPY1]] :: (store (s16) into %ir.addr, align 1, addrspace 1)
+  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:ptrdispregs = COPY [[COPY]]
+  ; CHECK-NEXT:   STDWPtrQRr [[COPY2]], 10, [[COPY1]] :: (store (s16) into %ir.addr, align 1, addrspace 1)
   ; CHECK-NEXT:   RET implicit $r1
   %int = ptrtoint ptr addrspace(1) %o to i16
   %or = or disjoint i16 %int, 10