[llvm] [LLVM][CodeGen][AArch64] Remove bogus lowering of sve_while{gt/ge/hi/hs} intrinsics. (PR #88126)

[Paul Walker via llvm-commits]

paulwalker-arm wrote:

> Sorry, While revisiting this review once again examining the change, I am a bit confused now. If we look at WHILE{GT/GE/HI,HS} instructions, according to the spec it says: ... for e = elements-1 downto 0 ... Looks like, it should not be a problem for traversing from high->low lanes?

The fact the WHILE{GT/GE/HI,HS} instructions traverse from high->low lanes is what makes the replacement with PTRUE incorrect.  For example:
```
whilege(2,0) -> 0 0 0 0 0 1 1 1
```
whereas:
```
ptrue vl3    -> 1 1 1 0 0 0 0 0
```

https://github.com/llvm/llvm-project/pull/88126