[llvm] [ValueTracking] Add support for most `llvm.vector.reduce.*` ops. (PR #88320)
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Thu Apr 11 09:22:18 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-analysis
Author: None (goldsteinn)
<details>
<summary>Changes</summary>
- **[ValueTracking] Add tests for `computeKnownBits` of `llvm.vector.reduce.{or,and}`; NFC**
- **[ValueTracking] Implement `computeKnownBits` for `llvm.vector.reduce.{or,and}`**
- **[ValueTracking] Add tests for `computeKnownBits` of `llvm.vector.reduce.xor`; NFC**
- **[ValueTracking] Implement `computeKnownBits` for `llvm.vector.reduce.xor`**
- **[ValueTracking] Add tests for `computeKnownBits` of `llvm.vector.reduce.{add,mul}`; NFC**
- **[ValueTracking] Implement `computeKnownBits` for `llvm.vector.reduce.{add,mul}`**
- **[ValueTracking] Add tests for `computeKnownFPClass` of `llvm.vector.reduce.{fmin,fmax,fmaximum,fminimum}`; NFC**
- **[ValueTracking] Implement `computeKnownFPClass` for `llvm.vector.reduce.{fmin,fmax,fmaximum,fminimum}`**
- **[ValueTracking] Add tests for `isKnownNonZero` of `llvm.vector.reduce.{add,mul}`; NFC**
- **[ValueTracking] Implement `isKnownNonZero` for `llvm.vector.reduce.{add,mul}`**
---
Full diff: https://github.com/llvm/llvm-project/pull/88320.diff
3 Files Affected:
- (modified) llvm/lib/Analysis/ValueTracking.cpp (+22-3)
- (modified) llvm/test/Transforms/InstCombine/known-bits.ll (+125)
- (modified) llvm/test/Transforms/InstSimplify/known-non-zero.ll (+23)
``````````diff
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 3a10de72a27562..4e9d446ddb1807 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -1621,14 +1621,32 @@ static void computeKnownBitsFromOperator(const Operator *I,
computeKnownBits(I->getOperand(1), Known2, Depth + 1, Q);
Known = KnownBits::ssub_sat(Known, Known2);
break;
- // for min/max reduce, any bit common to each element in the input vec
- // is set in the output.
+ // for min/max/and/or reduce, any bit common to each element in the
+ // input vec is set in the output.
+ case Intrinsic::vector_reduce_and:
+ case Intrinsic::vector_reduce_or:
case Intrinsic::vector_reduce_umax:
case Intrinsic::vector_reduce_umin:
case Intrinsic::vector_reduce_smax:
case Intrinsic::vector_reduce_smin:
computeKnownBits(I->getOperand(0), Known, Depth + 1, Q);
break;
+ case Intrinsic::vector_reduce_xor:
+ computeKnownBits(I->getOperand(0), Known, Depth + 1, Q);
+ // The zeros common to all vecs are zero in the output.
+ // If the number of elements is odd, then the common ones remain. If the
+ // number of elements is even, then the common ones becomes zeros.
+ if (auto *VecTy =
+ dyn_cast<FixedVectorType>(I->getOperand(0)->getType())) {
+ // Even, so the ones become zeros.
+ if ((VecTy->getNumElements() % 2) == 0) {
+ Known.Zero |= Known.One;
+ Known.One.clearAllBits();
+ }
+
+ } else
+ Known.One.clearAllBits();
+ break;
case Intrinsic::umin:
computeKnownBits(I->getOperand(0), Known, Depth + 1, Q);
computeKnownBits(I->getOperand(1), Known2, Depth + 1, Q);
@@ -2898,7 +2916,8 @@ static bool isKnownNonZeroFromOperator(const Operator *I,
return isNonZeroAdd(DemandedElts, Depth, Q, BitWidth,
II->getArgOperand(0), II->getArgOperand(1),
/*NSW=*/true, /* NUW=*/false);
- // umin/smin/smax/smin of all non-zero elements is always non-zero.
+ // umin/smin/smax/smin/or of all non-zero elements is always non-zero.
+ case Intrinsic::vector_reduce_or:
case Intrinsic::vector_reduce_umax:
case Intrinsic::vector_reduce_umin:
case Intrinsic::vector_reduce_smax:
diff --git a/llvm/test/Transforms/InstCombine/known-bits.ll b/llvm/test/Transforms/InstCombine/known-bits.ll
index d210b19bb7faf2..6c3701a32f227f 100644
--- a/llvm/test/Transforms/InstCombine/known-bits.ll
+++ b/llvm/test/Transforms/InstCombine/known-bits.ll
@@ -999,5 +999,130 @@ define i1 @extract_value_smul_fail(i8 %xx, i8 %yy) {
ret i1 %r
}
+define i8 @known_reduce_or(<2 x i8> %xx) {
+; CHECK-LABEL: @known_reduce_or(
+; CHECK-NEXT: ret i8 1
+;
+ %x = or <2 x i8> %xx, <i8 5, i8 3>
+ %v = call i8 @llvm.vector.reduce.or(<2 x i8> %x)
+ %r = and i8 %v, 1
+ ret i8 %r
+}
+
+define i8 @known_reduce_or_fail(<2 x i8> %xx) {
+; CHECK-LABEL: @known_reduce_or_fail(
+; CHECK-NEXT: [[X:%.*]] = or <2 x i8> [[XX:%.*]], <i8 5, i8 3>
+; CHECK-NEXT: [[V:%.*]] = call i8 @llvm.vector.reduce.or.v2i8(<2 x i8> [[X]])
+; CHECK-NEXT: [[R:%.*]] = and i8 [[V]], 4
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %x = or <2 x i8> %xx, <i8 5, i8 3>
+ %v = call i8 @llvm.vector.reduce.or(<2 x i8> %x)
+ %r = and i8 %v, 4
+ ret i8 %r
+}
+
+define i8 @known_reduce_and(<2 x i8> %xx) {
+; CHECK-LABEL: @known_reduce_and(
+; CHECK-NEXT: ret i8 1
+;
+ %x = or <2 x i8> %xx, <i8 5, i8 3>
+ %v = call i8 @llvm.vector.reduce.or(<2 x i8> %x)
+ %r = and i8 %v, 1
+ ret i8 %r
+}
+
+define i8 @known_reduce_and_fail(<2 x i8> %xx) {
+; CHECK-LABEL: @known_reduce_and_fail(
+; CHECK-NEXT: [[X:%.*]] = or <2 x i8> [[XX:%.*]], <i8 5, i8 3>
+; CHECK-NEXT: [[V:%.*]] = call i8 @llvm.vector.reduce.or.v2i8(<2 x i8> [[X]])
+; CHECK-NEXT: [[R:%.*]] = and i8 [[V]], 2
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %x = or <2 x i8> %xx, <i8 5, i8 3>
+ %v = call i8 @llvm.vector.reduce.or(<2 x i8> %x)
+ %r = and i8 %v, 2
+ ret i8 %r
+}
+
+define i8 @known_reduce_xor_even(<2 x i8> %xx) {
+; CHECK-LABEL: @known_reduce_xor_even(
+; CHECK-NEXT: ret i8 0
+;
+ %x = or <2 x i8> %xx, <i8 5, i8 3>
+ %v = call i8 @llvm.vector.reduce.xor(<2 x i8> %x)
+ %r = and i8 %v, 1
+ ret i8 %r
+}
+
+define i8 @known_reduce_xor_even2(<2 x i8> %xx) {
+; CHECK-LABEL: @known_reduce_xor_even2(
+; CHECK-NEXT: ret i8 0
+;
+ %x = and <2 x i8> %xx, <i8 15, i8 15>
+ %v = call i8 @llvm.vector.reduce.xor(<2 x i8> %x)
+ %r = and i8 %v, 16
+ ret i8 %r
+}
+
+define i8 @known_reduce_xor_even_fail(<2 x i8> %xx) {
+; CHECK-LABEL: @known_reduce_xor_even_fail(
+; CHECK-NEXT: [[X:%.*]] = or <2 x i8> [[XX:%.*]], <i8 5, i8 3>
+; CHECK-NEXT: [[V:%.*]] = call i8 @llvm.vector.reduce.xor.v2i8(<2 x i8> [[X]])
+; CHECK-NEXT: [[R:%.*]] = and i8 [[V]], 2
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %x = or <2 x i8> %xx, <i8 5, i8 3>
+ %v = call i8 @llvm.vector.reduce.xor(<2 x i8> %x)
+ %r = and i8 %v, 2
+ ret i8 %r
+}
+
+define i8 @known_reduce_xor_odd(<3 x i8> %xx) {
+; CHECK-LABEL: @known_reduce_xor_odd(
+; CHECK-NEXT: ret i8 1
+;
+ %x = or <3 x i8> %xx, <i8 5, i8 3, i8 9>
+ %v = call i8 @llvm.vector.reduce.xor.v3i8(<3 x i8> %x)
+ %r = and i8 %v, 1
+ ret i8 %r
+}
+
+define i8 @known_reduce_xor_odd2(<3 x i8> %xx) {
+; CHECK-LABEL: @known_reduce_xor_odd2(
+; CHECK-NEXT: ret i8 0
+;
+ %x = and <3 x i8> %xx, <i8 15, i8 15, i8 31>
+ %v = call i8 @llvm.vector.reduce.xor.v3i8(<3 x i8> %x)
+ %r = and i8 %v, 32
+ ret i8 %r
+}
+
+define i8 @known_reduce_xor_odd2_fail(<3 x i8> %xx) {
+; CHECK-LABEL: @known_reduce_xor_odd2_fail(
+; CHECK-NEXT: [[X:%.*]] = and <3 x i8> [[XX:%.*]], <i8 15, i8 15, i8 31>
+; CHECK-NEXT: [[V:%.*]] = call i8 @llvm.vector.reduce.xor.v3i8(<3 x i8> [[X]])
+; CHECK-NEXT: [[R:%.*]] = and i8 [[V]], 16
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %x = and <3 x i8> %xx, <i8 15, i8 15, i8 31>
+ %v = call i8 @llvm.vector.reduce.xor.v3i8(<3 x i8> %x)
+ %r = and i8 %v, 16
+ ret i8 %r
+}
+
+define i8 @known_reduce_xor_odd_fail(<3 x i8> %xx) {
+; CHECK-LABEL: @known_reduce_xor_odd_fail(
+; CHECK-NEXT: [[X:%.*]] = or <3 x i8> [[XX:%.*]], <i8 5, i8 3, i8 9>
+; CHECK-NEXT: [[V:%.*]] = call i8 @llvm.vector.reduce.xor.v3i8(<3 x i8> [[X]])
+; CHECK-NEXT: [[R:%.*]] = and i8 [[V]], 2
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %x = or <3 x i8> %xx, <i8 5, i8 3, i8 9>
+ %v = call i8 @llvm.vector.reduce.xor.v3i8(<3 x i8> %x)
+ %r = and i8 %v, 2
+ ret i8 %r
+}
+
declare void @use(i1)
declare void @sink(i8)
diff --git a/llvm/test/Transforms/InstSimplify/known-non-zero.ll b/llvm/test/Transforms/InstSimplify/known-non-zero.ll
index d9b8f5eed32390..fd2862eb04a24d 100644
--- a/llvm/test/Transforms/InstSimplify/known-non-zero.ll
+++ b/llvm/test/Transforms/InstSimplify/known-non-zero.ll
@@ -377,3 +377,26 @@ define <2 x i1> @insert_nonzero_any_idx_fail(<2 x i8> %xx, i8 %yy, i32 %idx) {
%r = icmp eq <2 x i8> %ins, zeroinitializer
ret <2 x i1> %r
}
+
+define i1 @nonzero_reduce_or(<2 x i8> %xx) {
+; CHECK-LABEL: @nonzero_reduce_or(
+; CHECK-NEXT: ret i1 false
+;
+ %x = add nuw <2 x i8> %xx, <i8 1, i8 1>
+ %v = call i8 @llvm.vector.reduce.or(<2 x i8> %x)
+ %r = icmp eq i8 %v, 0
+ ret i1 %r
+}
+
+define i1 @nonzero_reduce_or_fail(<2 x i8> %xx) {
+; CHECK-LABEL: @nonzero_reduce_or_fail(
+; CHECK-NEXT: [[X:%.*]] = add nsw <2 x i8> [[XX:%.*]], <i8 1, i8 1>
+; CHECK-NEXT: [[V:%.*]] = call i8 @llvm.vector.reduce.or.v2i8(<2 x i8> [[X]])
+; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[V]], 0
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %x = add nsw <2 x i8> %xx, <i8 1, i8 1>
+ %v = call i8 @llvm.vector.reduce.or(<2 x i8> %x)
+ %r = icmp eq i8 %v, 0
+ ret i1 %r
+}
``````````
</details>
https://github.com/llvm/llvm-project/pull/88320
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