[llvm] [DAG] Prevent combination on small negative value for vscale (PR #88108)

[Paul Walker via llvm-commits]

paulwalker-arm wrote:

I don't think this works because we have other patterns that do support VScale with a negative multiply value.  Which is why we did not limit the value and instead took the hit of having the extra patterns.  I honestly think for today the best solution is to just add the three extra patterns to remove the explicit negation.

https://github.com/llvm/llvm-project/pull/88108