[llvm] [mi-sched] Suppress register pressure with i64. (PR #88256)

via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 11 06:26:57 PDT 2024


lcvon007 wrote:

> LGTM though I think this existed traversal of all int VTs is kind of silly, but I don't figure out a better way now.

This heuristic is first introduced in  66c3dfbf8c137ae51afe by Andrew, and it only check MVT::i32, and do a refactor like current  codes to fix llc crash in 350ff2c084470.

Like X86, i64, i32, i16, i8 are all legal register type with same allocatable register number and it has no break in loop, so it will use the register number of i8 to do final check, and we can see it's a rough checking rule like Andrew says.

I try to find interface to get the XLen to simplify this logic, but it doesn't have yet.

I have updated codes adding one break in the loop so it only checks the first legal register type(it has the same behaviour like before), please help review again @wangpc-pp 



https://github.com/llvm/llvm-project/pull/88256


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