[llvm] [InstCombine] Propagate exact flags in shift-combines (PR #88340)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 10 22:58:55 PDT 2024
================
@@ -1395,11 +1395,17 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) {
}
// (X >>u C1) >>u C --> X >>u (C1 + C)
- if (match(Op0, m_LShr(m_Value(X), m_APInt(C1)))) {
+ Instruction *Inst;
+ if (match(Op0, m_Instruction(Inst)) &&
+ match(Inst, m_LShr(m_Value(X), m_APInt(C1)))) {
// Oversized shifts are simplified to zero in InstSimplify.
unsigned AmtSum = ShAmtC + C1->getZExtValue();
- if (AmtSum < BitWidth)
- return BinaryOperator::CreateLShr(X, ConstantInt::get(Ty, AmtSum));
+ if (AmtSum < BitWidth) {
+ auto *NewLShr =
+ BinaryOperator::CreateLShr(X, ConstantInt::get(Ty, AmtSum));
+ NewLShr->setIsExact(I.isExact() && Inst->isExact());
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goldsteinn wrote:
Think you can just `cast<Instruction>(Op0)->isExact()` and keep the original match logic.
https://github.com/llvm/llvm-project/pull/88340
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