[llvm] [InstCombine] Support division of numbers that can be converted to a shift (PR #88220)
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Wed Apr 10 19:38:58 PDT 2024
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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
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git-clang-format --diff 51f1681424f1a8ccf1e3432d71c341e799597171 7017287fbfcbd9b4d99d1f106f35aff88578b7f8 -- llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 5b7454c034..ed7e873d6a 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -1165,21 +1165,21 @@ Instruction *InstCombinerImpl::commonIDivTransforms(BinaryOperator &I) {
// Returns false if division by 0
if (isMultiple(*C2, C3, Q, IsSigned) && Q.isPowerOf2()) {
auto *OBO = cast<OverflowingBinaryOperator>(Op0);
- APInt C4 = IsSigned ? C1->sdiv(C3) : C1->udiv(C3);
- auto *Mul = Builder.CreateMul(
- X, ConstantInt::get(Ty, C4), "",
- // If it is unsigned, then we cannot have any nsw or nuw flags.
- // It has been tried before, but no avail.
- /* HasNUW */ OBO->hasNoUnsignedWrap() && IsSigned,
- /* HasNSW */ IsSigned);
-
- // Because both the multiplier and divisor are unsigned, we can use
- // lshr
- // TODO: revisit this if we let negative powers of 2
- Instruction *Shift = BinaryOperator::CreateLShr(
- Mul, ConstantInt::get(Ty, Q.logBase2()));
- Shift->setIsExact(I.isExact());
- return Shift;
+ APInt C4 = IsSigned ? C1->sdiv(C3) : C1->udiv(C3);
+ auto *Mul = Builder.CreateMul(
+ X, ConstantInt::get(Ty, C4), "",
+ // If it is unsigned, then we cannot have any nsw or nuw flags.
+ // It has been tried before, but no avail.
+ /* HasNUW */ OBO->hasNoUnsignedWrap() && IsSigned,
+ /* HasNSW */ IsSigned);
+
+ // Because both the multiplier and divisor are unsigned, we can use
+ // lshr
+ // TODO: revisit this if we let negative powers of 2
+ Instruction *Shift = BinaryOperator::CreateLShr(
+ Mul, ConstantInt::get(Ty, Q.logBase2()));
+ Shift->setIsExact(I.isExact());
+ return Shift;
}
}
}
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https://github.com/llvm/llvm-project/pull/88220
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