[llvm] 77d6684 - [ValueTracking] Add support for `vector_reduce_{s,u}{min,max}` in `isKnownNonZero`

[Noah Goldstein via llvm-commits]

Author: Noah Goldstein
Date: 2024-04-10T10:40:48-05:00
New Revision: 77d668451ad2e6370eb595c171779429e9becdf2

URL: https://github.com/llvm/llvm-project/commit/77d668451ad2e6370eb595c171779429e9becdf2
DIFF: https://github.com/llvm/llvm-project/commit/77d668451ad2e6370eb595c171779429e9becdf2.diff

LOG: [ValueTracking] Add support for `vector_reduce_{s,u}{min,max}` in `isKnownNonZero`

Previously missing, proofs for all implementations:
https://alive2.llvm.org/ce/z/G8wpmG

Added: 
    

Modified: 
    llvm/lib/Analysis/ValueTracking.cpp
    llvm/test/Transforms/InstCombine/vector-reduce-min-max-known.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index ca48cfe7738154..869a94d81f4dfd 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -2824,6 +2824,12 @@ static bool isKnownNonZeroFromOperator(const Operator *I,
         return isNonZeroAdd(DemandedElts, Depth, Q, BitWidth,
                             II->getArgOperand(0), II->getArgOperand(1),
                             /*NSW=*/true, /* NUW=*/false);
+        // umin/smin/smax/smin of all non-zero elements is always non-zero.
+      case Intrinsic::vector_reduce_umax:
+      case Intrinsic::vector_reduce_umin:
+      case Intrinsic::vector_reduce_smax:
+      case Intrinsic::vector_reduce_smin:
+        return isKnownNonZero(II->getArgOperand(0), Depth, Q);
       case Intrinsic::umax:
       case Intrinsic::uadd_sat:
         return isKnownNonZero(II->getArgOperand(1), DemandedElts, Depth, Q) ||

diff  --git a/llvm/test/Transforms/InstCombine/vector-reduce-min-max-known.ll b/llvm/test/Transforms/InstCombine/vector-reduce-min-max-known.ll
index a02ebcca8090a2..29c08b17ef885a 100644
--- a/llvm/test/Transforms/InstCombine/vector-reduce-min-max-known.ll
+++ b/llvm/test/Transforms/InstCombine/vector-reduce-min-max-known.ll
@@ -29,10 +29,7 @@ define i1 @vec_reduce_umax_non_zero_fail(<4 x i8> %xx) {
 
 define i1 @vec_reduce_umin_non_zero(<4 x i8> %xx) {
 ; CHECK-LABEL: @vec_reduce_umin_non_zero(
-; CHECK-NEXT:    [[X:%.*]] = add nuw <4 x i8> [[XX:%.*]], <i8 1, i8 1, i8 1, i8 1>
-; CHECK-NEXT:    [[V:%.*]] = call i8 @llvm.vector.reduce.umin.v4i8(<4 x i8> [[X]])
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[V]], 0
-; CHECK-NEXT:    ret i1 [[R]]
+; CHECK-NEXT:    ret i1 false
 ;
   %x = add nuw <4 x i8> %xx, <i8 1, i8 1, i8 1, i8 1>
   %v = call i8 @llvm.vector.reduce.umin(<4 x i8> %x)
@@ -55,10 +52,7 @@ define i1 @vec_reduce_umin_non_zero_fail(<4 x i8> %xx) {
 
 define i1 @vec_reduce_smax_non_zero0(<4 x i8> %xx) {
 ; CHECK-LABEL: @vec_reduce_smax_non_zero0(
-; CHECK-NEXT:    [[X:%.*]] = add nuw <4 x i8> [[XX:%.*]], <i8 1, i8 1, i8 1, i8 1>
-; CHECK-NEXT:    [[V:%.*]] = call i8 @llvm.vector.reduce.smax.v4i8(<4 x i8> [[X]])
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[V]], 0
-; CHECK-NEXT:    ret i1 [[R]]
+; CHECK-NEXT:    ret i1 false
 ;
   %x = add nuw <4 x i8> %xx, <i8 1, i8 1, i8 1, i8 1>
   %v = call i8 @llvm.vector.reduce.smax(<4 x i8> %x)
@@ -98,10 +92,7 @@ define i1 @vec_reduce_smax_non_zero_fail(<4 x i8> %xx) {
 
 define i1 @vec_reduce_smin_non_zero0(<4 x i8> %xx) {
 ; CHECK-LABEL: @vec_reduce_smin_non_zero0(
-; CHECK-NEXT:    [[X:%.*]] = add nuw <4 x i8> [[XX:%.*]], <i8 1, i8 1, i8 1, i8 1>
-; CHECK-NEXT:    [[V:%.*]] = call i8 @llvm.vector.reduce.smin.v4i8(<4 x i8> [[X]])
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[V]], 0
-; CHECK-NEXT:    ret i1 [[R]]
+; CHECK-NEXT:    ret i1 false
 ;
   %x = add nuw <4 x i8> %xx, <i8 1, i8 1, i8 1, i8 1>
   %v = call i8 @llvm.vector.reduce.smin(<4 x i8> %x)