[llvm] [RISCV] Support postRA vsetvl insertion pass (PR #70549)

[Piyou Chen via llvm-commits]

================
@@ -963,18 +1089,22 @@ void RISCVInsertVSETVLI::insertVSETVLI(MachineBasicBlock &MBB,
     // the previous vl to become invalid.
     if (PrevInfo.isValid() && !PrevInfo.isUnknown() &&
         Info.hasSameVLMAX(PrevInfo)) {
-      BuildMI(MBB, InsertPt, DL, TII->get(RISCV::PseudoVSETVLIX0))
-          .addReg(RISCV::X0, RegState::Define | RegState::Dead)
-          .addReg(RISCV::X0, RegState::Kill)
-          .addImm(Info.encodeVTYPE())
-          .addReg(RISCV::VL, RegState::Implicit);
+      auto NeedFixupMI =
+          BuildMI(MBB, InsertPt, DL, TII->get(RISCV::PseudoVSETVLIX0))
+              .addReg(RISCV::X0, RegState::Define | RegState::Dead)
+              .addReg(RISCV::X0, RegState::Kill)
+              .addImm(Info.encodeVTYPE())
+              .addReg(RISCV::VL, RegState::Implicit);
+      fixupModifyVRegLIAfterInsertMI(NeedFixupMI, LIS);
----------------
BeMg wrote:

If we doesn't fixup, it will raise `*** Bad machine code: Missing slot index ***` during `verfiyMachineInstr`.

The reason is insert new instruction will also change the `SlotIndex`. The part of `fixupModifyVRegLIAfterInsertMI` try handle SlotIndex change inside LIS.

```
  if (LIS->isNotInMIMap(*MI))
    LIS->InsertMachineInstrInMaps(*MI);

  LIS->handleMove(*MI);
``` 

Maybe I can update ``fixupModifyVRegLIAfterInsertMI` with `fixupLIAfterInsertMI` for better description of function.


https://github.com/llvm/llvm-project/pull/70549