[llvm] [PowerPC] Spill non-volatile registers required for traceback table (PR #71115)

[Maryam Moghadas via llvm-commits]

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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mcpu=pwr9 -mattr=+altivec -verify-machineinstrs --vec-extabi \
+; RUN:   -mtriple=powerpc-unknown-aix < %s  | FileCheck %s --check-prefix 32BIT
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maryammo wrote:

done

https://github.com/llvm/llvm-project/pull/71115