[llvm] [PowerPC] Spill non-volatile registers required for traceback table (PR #71115)

[Maryam Moghadas via llvm-commits]

================
@@ -387,7 +387,7 @@ entry:
 ; ASM64BIT:       bl .test_byval_mem4
 ; ASM64BIT:       addi 1, 1, 352
 
-define void @test_byval_mem4(i32, ptr byval(%struct_S31) align 1, ptr byval(%struct_S256) align 1 %s) {
+define void @test_byval_mem4(i32, ptr byval(%struct_S31) align 1, ptr byval(%struct_S256) align 1 %s) #0 {
----------------
maryammo wrote:

No it does not make a difference. Initially the `nounwind` was added separately and this test was updated because of that. I removed it. 

https://github.com/llvm/llvm-project/pull/71115