[llvm] Add an all-in-one histogram intrinsic, along with lowering for AArch64 (PR #88106)

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git-clang-format --diff 24e8c6a09b7d226dbe706aeae7aebf479a1e5087 035f7a44d4dd10af4fd865e469b0e3833cbedf65 -- llvm/include/llvm/CodeGen/ISDOpcodes.h llvm/include/llvm/CodeGen/SelectionDAG.h llvm/include/llvm/CodeGen/SelectionDAGNodes.h llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index b7f80a0601..6c500101d3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -9531,8 +9531,7 @@ SDValue SelectionDAG::getMaskedScatter(SDVTList VTs, EVT MemVT, const SDLoc &dl,
 }
 
 SDValue SelectionDAG::getMaskedHistogram(SDVTList VTs, EVT MemVT,
-                                         const SDLoc &dl,
-                                         ArrayRef<SDValue> Ops,
+                                         const SDLoc &dl, ArrayRef<SDValue> Ops,
                                          MachineMemOperand *MMO,
                                          ISD::MemIndexType IndexType) {
   assert(Ops.size() == 6 && "Incompatible number of operands");
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 235c79384f..687cbb86fe 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -7965,15 +7965,16 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
     unsigned AS = Ptr->getType()->getScalarType()->getPointerAddressSpace();
 
     MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
-      MachinePointerInfo(AS),
-      MachineMemOperand::MOLoad | MachineMemOperand::MOStore,
-      MemoryLocation::UnknownSize, Alignment, I.getAAMetadata(), Ranges);
+        MachinePointerInfo(AS),
+        MachineMemOperand::MOLoad | MachineMemOperand::MOStore,
+        MemoryLocation::UnknownSize, Alignment, I.getAAMetadata(), Ranges);
 
     if (!UniformBase) {
       Base = DAG.getConstant(0, sdl, TLI.getPointerTy(DAG.getDataLayout()));
       Index = getValue(Ptr);
       IndexType = ISD::SIGNED_SCALED;
-      Scale = DAG.getTargetConstant(1, sdl, TLI.getPointerTy(DAG.getDataLayout()));
+      Scale =
+          DAG.getTargetConstant(1, sdl, TLI.getPointerTy(DAG.getDataLayout()));
     }
 
     EVT IdxVT = Index.getValueType();
@@ -7983,7 +7984,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
       Index = DAG.getNode(ISD::SIGN_EXTEND, sdl, NewIdxVT, Index);
     }
 
-    SDValue Ops[] = { Root, Inc, Mask, Base, Index, Scale };
+    SDValue Ops[] = {Root, Inc, Mask, Base, Index, Scale};
     SDValue Histogram = DAG.getMaskedHistogram(DAG.getVTList(MVT::Other), VT,
                                                sdl, Ops, MMO, IndexType);
 
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
index 5c8d2fc921..f2ef82a309 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
@@ -528,7 +528,8 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
   case ISD::PATCHPOINT:
     return "patchpoint";
 
-  case ISD::EXPERIMENTAL_HISTOGRAM:     return "histogram";
+  case ISD::EXPERIMENTAL_HISTOGRAM:
+    return "histogram";
 
     // Vector Predication
 #define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...)                    \
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 914b3cb861..57444b6a99 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -6703,26 +6703,25 @@ SDValue AArch64TargetLowering::LowerOperation(SDValue Op,
     GMMO->setFlags(MachineMemOperand::MOLoad);
     ISD::MemIndexType IndexType = HG->getIndexType();
     SDValue Gather =
-                DAG.getMaskedGather(DAG.getVTList(MemVT, MVT::Other), MemVT, DL,
-                                    Ops, HG->getMemOperand(),
-                                    IndexType, ISD::NON_EXTLOAD);
+        DAG.getMaskedGather(DAG.getVTList(MemVT, MVT::Other), MemVT, DL, Ops,
+                            HG->getMemOperand(), IndexType, ISD::NON_EXTLOAD);
 
     SDValue GChain = Gather.getValue(1);
 
     // Perform the histcnt, multiply by inc, add to bucket data.
-    SDValue ID = DAG.getTargetConstant(Intrinsic::aarch64_sve_histcnt, DL, IncVT);
-    SDValue HistCnt = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, IndexVT, ID, Mask,
-                                  Index, Index);
+    SDValue ID =
+        DAG.getTargetConstant(Intrinsic::aarch64_sve_histcnt, DL, IncVT);
+    SDValue HistCnt = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, IndexVT, ID,
+                                  Mask, Index, Index);
     SDValue Mul = DAG.getNode(ISD::MUL, DL, MemVT, HistCnt, IncSplat);
     SDValue Add = DAG.getNode(ISD::ADD, DL, MemVT, Gather, Mul);
 
-
     // Create a new MMO for the scatter.
     MachineMemOperand *SMMO = DAG.getMachineFunction().getMachineMemOperand(
-        GMMO->getPointerInfo(), MachineMemOperand::MOStore,
-        GMMO->getSize(), GMMO->getAlign(), GMMO->getAAInfo());
+        GMMO->getPointerInfo(), MachineMemOperand::MOStore, GMMO->getSize(),
+        GMMO->getAlign(), GMMO->getAAInfo());
 
-    SDValue ScatterOps[] = { GChain, Add, Mask, Ptr, Index, Scale };
+    SDValue ScatterOps[] = {GChain, Add, Mask, Ptr, Index, Scale};
     SDValue Scatter = DAG.getMaskedScatter(DAG.getVTList(MVT::Other), MemVT, DL,
                                            ScatterOps, SMMO, IndexType, false);
     return Scatter;

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https://github.com/llvm/llvm-project/pull/88106