[llvm] [RISCV] Remove interrupt handler special case from RISCVFrameLowering::determineCalleeSaves. (PR #88069)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 8 16:31:13 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Craig Topper (topperc)
<details>
<summary>Changes</summary>
This code was trying to save temporary argument registers in interrupt handler functions that contain calls. With the exception that all FP registers are saved including the normally callee saved registers.
If all of the callees use an FP ABI and the interrupt handler doesn't touch the normally callee saved FP registers, we don't need to save them.
It doesn't appear that we need to special case functions with calls. The normal handling will already check each of the calls and consider a register clobbered if the call doesn't explicitly say it is preserved.
All of the test changes are from the removal of the FP callee saved registers. There are tests for interrupt handlers with F and D extension that use ilp32 or lp64 ABIs that are not affected by this change. They still save the FP callee saved registers as they should.
gcc appears to have a bug where the D extension being enabled with the ilp32f or lp64f ABI does not save the FP callee saved regs. The callee would only save/restore the lower 32 bits and clobber the upper bits. LLVM saves the FP callee saved regs in this case and there is an unchanged for it.
The unnecessary save/restore was raised in this thread https://discourse.llvm.org/t/has-bugs-when-optimizing-save-restore-csrs-by-changing-csr-xlen-f32-interrupt/78200/1
---
Patch is 107.85 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/88069.diff
3 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCVFrameLowering.cpp (-40)
- (modified) llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll (+135-183)
- (modified) llvm/test/CodeGen/RISCV/interrupt-attr.ll (+540-732)
``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index 39075c81b2921f..71672ed7b4ae7f 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -1001,46 +1001,6 @@ void RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF,
// Mark BP as used if function has dedicated base pointer.
if (hasBP(MF))
SavedRegs.set(RISCVABI::getBPReg());
-
- // If interrupt is enabled and there are calls in the handler,
- // unconditionally save all Caller-saved registers and
- // all FP registers, regardless whether they are used.
- MachineFrameInfo &MFI = MF.getFrameInfo();
- auto &Subtarget = MF.getSubtarget<RISCVSubtarget>();
-
- if (MF.getFunction().hasFnAttribute("interrupt") && MFI.hasCalls()) {
-
- static const MCPhysReg CSRegs[] = { RISCV::X1, /* ra */
- RISCV::X5, RISCV::X6, RISCV::X7, /* t0-t2 */
- RISCV::X10, RISCV::X11, /* a0-a1, a2-a7 */
- RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17,
- RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31 /* t3-t6 */
- };
-
- for (auto Reg : CSRegs)
- SavedRegs.set(Reg);
-
- // According to psABI, if ilp32e/lp64e ABIs are used with an ISA that
- // has any of the registers x16-x31 and f0-f31, then these registers are
- // considered temporaries, so we should also save x16-x31 here.
- if (STI.getTargetABI() == RISCVABI::ABI_ILP32E ||
- STI.getTargetABI() == RISCVABI::ABI_LP64E) {
- for (MCPhysReg Reg = RISCV::X16; Reg <= RISCV::X31; Reg++)
- SavedRegs.set(Reg);
- }
-
- if (Subtarget.hasStdExtF()) {
-
- // If interrupt is enabled, this list contains all FP registers.
- const MCPhysReg * Regs = MF.getRegInfo().getCalleeSavedRegs();
-
- for (unsigned i = 0; Regs[i]; ++i)
- if (RISCV::FPR16RegClass.contains(Regs[i]) ||
- RISCV::FPR32RegClass.contains(Regs[i]) ||
- RISCV::FPR64RegClass.contains(Regs[i]))
- SavedRegs.set(Regs[i]);
- }
- }
}
std::pair<int64_t, Align>
diff --git a/llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll b/llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
index 263743d39a8e68..fa6ac96b57b1eb 100644
--- a/llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
+++ b/llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
@@ -412,51 +412,39 @@ define void @foo_double() nounwind #0 {
;
; CHECK-RV32IF-LABEL: foo_double:
; CHECK-RV32IF: # %bb.0:
-; CHECK-RV32IF-NEXT: addi sp, sp, -192
-; CHECK-RV32IF-NEXT: sw ra, 188(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t0, 184(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t1, 180(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t2, 176(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a0, 172(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a1, 168(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a2, 164(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a3, 160(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a4, 156(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a5, 152(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a6, 148(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a7, 144(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t3, 140(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t4, 136(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t5, 132(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t6, 128(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft0, 124(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft1, 120(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft2, 116(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft3, 112(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft4, 108(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft5, 104(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft6, 100(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft7, 96(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs0, 92(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs1, 88(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa0, 84(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa1, 80(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa2, 76(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa3, 72(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa4, 68(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa5, 64(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa6, 60(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa7, 56(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs2, 52(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs3, 48(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs4, 44(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs5, 40(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs6, 36(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs7, 32(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs8, 28(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs9, 24(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs10, 20(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs11, 16(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: addi sp, sp, -144
+; CHECK-RV32IF-NEXT: sw ra, 140(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t0, 136(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t1, 132(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t2, 128(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a0, 124(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a1, 120(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a2, 116(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a3, 112(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a4, 108(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a5, 104(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a6, 100(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a7, 96(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t3, 92(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t4, 88(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t5, 84(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t6, 80(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft0, 76(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft1, 72(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft2, 68(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft3, 64(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft4, 60(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft5, 56(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft6, 52(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft7, 48(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa0, 44(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa1, 40(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa2, 36(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa3, 32(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa4, 28(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa5, 24(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa6, 20(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa7, 16(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft8, 12(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft9, 8(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft10, 4(sp) # 4-byte Folded Spill
@@ -471,55 +459,43 @@ define void @foo_double() nounwind #0 {
; CHECK-RV32IF-NEXT: lui a2, %hi(g)
; CHECK-RV32IF-NEXT: sw a1, %lo(g+4)(a2)
; CHECK-RV32IF-NEXT: sw a0, %lo(g)(a2)
-; CHECK-RV32IF-NEXT: lw ra, 188(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t0, 184(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t1, 180(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t2, 176(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a0, 172(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a1, 168(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a2, 164(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a3, 160(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a4, 156(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a5, 152(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a6, 148(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a7, 144(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t3, 140(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t4, 136(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t5, 132(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t6, 128(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft0, 124(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft1, 120(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft2, 116(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft3, 112(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft4, 108(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft5, 104(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft6, 100(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft7, 96(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs0, 92(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs1, 88(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fa0, 84(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fa1, 80(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fa2, 76(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fa3, 72(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fa4, 68(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fa5, 64(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fa6, 60(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fa7, 56(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs2, 52(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs3, 48(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs4, 44(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs5, 40(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs6, 36(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs7, 32(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs8, 28(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs9, 24(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs10, 20(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs11, 16(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw ra, 140(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw t0, 136(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw t1, 132(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw t2, 128(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw a0, 124(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw a1, 120(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw a2, 116(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw a3, 112(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw a4, 108(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw a5, 104(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw a6, 100(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw a7, 96(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw t3, 92(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw t4, 88(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw t5, 84(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: lw t6, 80(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw ft0, 76(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw ft1, 72(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw ft2, 68(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw ft3, 64(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw ft4, 60(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw ft5, 56(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw ft6, 52(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw ft7, 48(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw fa0, 44(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw fa1, 40(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw fa2, 36(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw fa3, 32(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw fa4, 28(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw fa5, 24(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw fa6, 20(sp) # 4-byte Folded Reload
+; CHECK-RV32IF-NEXT: flw fa7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft8, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft9, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft10, 4(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft11, 0(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: addi sp, sp, 192
+; CHECK-RV32IF-NEXT: addi sp, sp, 144
; CHECK-RV32IF-NEXT: mret
;
; CHECK-RV32IFD-LABEL: foo_double:
@@ -604,57 +580,45 @@ define void @foo_fp_double() nounwind #1 {
;
; CHECK-RV32IF-LABEL: foo_fp_double:
; CHECK-RV32IF: # %bb.0:
-; CHECK-RV32IF-NEXT: addi sp, sp, -208
-; CHECK-RV32IF-NEXT: sw ra, 204(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t0, 200(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t1, 196(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t2, 192(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw s0, 188(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a0, 184(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a1, 180(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a2, 176(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a3, 172(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a4, 168(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a5, 164(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a6, 160(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw a7, 156(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t3, 152(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t4, 148(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t5, 144(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: sw t6, 140(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft0, 136(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft1, 132(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft2, 128(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft3, 124(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft4, 120(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft5, 116(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft6, 112(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw ft7, 108(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs0, 104(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs1, 100(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa0, 96(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa1, 92(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa2, 88(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa3, 84(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa4, 80(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa5, 76(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa6, 72(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fa7, 68(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs2, 64(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs3, 60(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs4, 56(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs5, 52(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs6, 48(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs7, 44(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs8, 40(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs9, 36(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs10, 32(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: fsw fs11, 28(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: addi sp, sp, -160
+; CHECK-RV32IF-NEXT: sw ra, 156(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t0, 152(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t1, 148(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t2, 144(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw s0, 140(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a0, 136(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a1, 132(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a2, 128(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a3, 124(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a4, 120(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a5, 116(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a6, 112(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw a7, 108(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t3, 104(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t4, 100(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t5, 96(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: sw t6, 92(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft0, 88(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft1, 84(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft2, 80(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft3, 76(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft4, 72(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft5, 68(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft6, 64(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw ft7, 60(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa0, 56(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa1, 52(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa2, 48(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa3, 44(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa4, 40(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa5, 36(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa6, 32(sp) # 4-byte Folded Spill
+; CHECK-RV32IF-NEXT: fsw fa7, 28(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft8, 24(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft9, 20(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft10, 16(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft11, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32IF-NEXT: addi s0, sp, 208
+; CHECK-RV32IF-NEXT: addi s0, sp, 160
; CHECK-RV32IF-NEXT: lui a1, %hi(h)
; CHECK-RV32IF-NEXT: lw a0, %lo(h)(a1)
; CHECK-RV32IF-NEXT: lw a1, %lo(h+4)(a1)
@@ -665,56 +629,44 @@ define void @foo_fp_double() nounwind #1 {
; CHECK-RV32IF-NEXT: lui a2, %hi(g)
; CHECK-RV32IF-NEXT: sw a1, %lo(g+4)(a2)
; CHECK-RV32IF-NEXT: sw a0, %lo(g)(a2)
-; CHECK-RV32IF-NEXT: lw ra, 204(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t0, 200(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t1, 196(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t2, 192(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw s0, 188(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a0, 184(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a1, 180(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a2, 176(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a3, 172(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a4, 168(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a5, 164(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a6, 160(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw a7, 156(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t3, 152(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t4, 148(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t5, 144(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: lw t6, 140(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft0, 136(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft1, 132(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft2, 128(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft3, 124(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft4, 120(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft5, 116(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft6, 112(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw ft7, 108(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs0, 104(sp) # 4-byte Folded Reload
-; CHECK-RV32IF-NEXT: flw fs1, ...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/88069
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