[llvm] [Spirv][HLSL] Add OpAll lowering and float vec support (PR #87952)

[Farzon Lotfi via llvm-commits]

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@@ -164,9 +178,82 @@ SPIRVGlobalRegistry::getOrCreateConstIntReg(uint64_t Val, SPIRVType *SpvType,
   return std::make_tuple(Res, CI, NewInstr);
 }
 
+std::tuple<Register, ConstantFP *, bool, unsigned>
+SPIRVGlobalRegistry::getOrCreateConstFloatReg(APFloat Val, SPIRVType *SpvType,
+                                              MachineIRBuilder *MIRBuilder,
+                                              MachineInstr *I,
+                                              const SPIRVInstrInfo *TII) {
+  const Type *LLVMFloatTy;
+  LLVMContext &Ctx = CurMF->getFunction().getContext();
+  unsigned BitWidth = 32;
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farzonl wrote:

it needs to be here so I can return it as part of make_tuple at the bottom. returning the bit width reduces multiple calls to `getScalarOrVectorBitWidth`

https://github.com/llvm/llvm-project/pull/87952