[llvm] [X86][AVX] Fix handling of out-of-bounds shift amounts in AVX2 vector logical shift nodes #83840 (PR #86922)

[Simon Pilgrim via llvm-commits]

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@@ -45566,6 +45566,19 @@ static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
     }
   }
 
+  if (N->getOpcode() == ISD::VSELECT && LHS.getOpcode() == ISD::SRL &&
+      supportedVectorVarShift(VT, Subtarget, ISD::SRL)) {
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RKSimon wrote:

This should work for ISD::SHL as well:
```
  if (N->getOpcode() == ISD::VSELECT &&
      (LHS.getOpcode() == ISD::SRL || LHS.getOpcode() == ISD::SHL) &&
      supportedVectorVarShift(VT, Subtarget, LHS.getOpcode())) {
```

https://github.com/llvm/llvm-project/pull/86922