[llvm] 8e98435 - [GISel][Combine] Enhance combining on G_BUILD_VECTOR
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Sat Apr 6 15:33:04 PDT 2024
Author: darkbuck
Date: 2024-04-06T18:33:01-04:00
New Revision: 8e98435ae9eb34f04c4b1b97975f152c4ba63ba3
URL: https://github.com/llvm/llvm-project/commit/8e98435ae9eb34f04c4b1b97975f152c4ba63ba3
DIFF: https://github.com/llvm/llvm-project/commit/8e98435ae9eb34f04c4b1b97975f152c4ba63ba3.diff
LOG: [GISel][Combine] Enhance combining on G_BUILD_VECTOR
Reviewers: aemerson, arsenm
Reviewed By: arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/87831
Added:
Modified:
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 0b58d95bc8b2b1..40c5119ee7fb3b 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -2925,8 +2925,10 @@ bool CombinerHelper::matchCombineInsertVecElts(
}
return true;
}
- // If we didn't end in a G_IMPLICIT_DEF, bail out.
- return TmpInst->getOpcode() == TargetOpcode::G_IMPLICIT_DEF;
+ // If we didn't end in a G_IMPLICIT_DEF and the source is not fully
+ // overwritten, bail out.
+ return TmpInst->getOpcode() == TargetOpcode::G_IMPLICIT_DEF ||
+ all_of(MatchInfo, [](Register Reg) { return !!Reg; });
}
void CombinerHelper::applyCombineInsertVecElts(
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
index c2a38e26676cf9..a65b43d33e4911 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
@@ -220,6 +220,37 @@ body: |
$x0 = COPY %extract(s64)
RET_ReallyLR implicit $x0
+...
+---
+# This test checks that this combine runs after the insertvec->build_vector
+name: extract_from_insert2
+tracksRegLiveness: true
+liveins:
+ - { reg: '$x0' }
+ - { reg: '$x1' }
+frameInfo:
+ maxAlignment: 1
+body: |
+ bb.1:
+ liveins: $q0, $x0, $x1
+ ; CHECK-LABEL: name: extract_from_insert2
+ ; CHECK: liveins: $q0, $x0, $x1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: %arg1:_(s64) = COPY $x0
+ ; CHECK-NEXT: %arg2:_(s64) = COPY $x1
+ ; CHECK-NEXT: %ins2:_(<2 x s64>) = G_BUILD_VECTOR %arg1(s64), %arg2(s64)
+ ; CHECK-NEXT: $q0 = COPY %ins2(<2 x s64>)
+ ; CHECK-NEXT: RET_ReallyLR implicit $q0
+ %arg0:_(<2 x s64>) = COPY $q0
+ %arg1:_(s64) = COPY $x0
+ %arg2:_(s64) = COPY $x1
+ %zero:_(s32) = G_CONSTANT i32 0
+ %one:_(s32) = G_CONSTANT i32 1
+ %ins1:_(<2 x s64>) = G_INSERT_VECTOR_ELT %arg0, %arg1(s64), %zero(s32)
+ %ins2:_(<2 x s64>) = G_INSERT_VECTOR_ELT %ins1, %arg2(s64), %one(s32)
+ $q0 = COPY %ins2(<2 x s64>)
+ RET_ReallyLR implicit $q0
+
...
---
name: extract_from_idx_negative
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