[llvm] AMDGPU: Undo atomicrmw add/sub/xor 0 -> atomicrmw or canonicalization (PR #87533)

[Matt Arsenault via llvm-commits]

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@@ -16027,6 +16027,19 @@ SITargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *RMW) const {
       SSID == RMW->getContext().getOrInsertSyncScopeID("one-as");
 
   switch (RMW->getOperation()) {
+  case AtomicRMWInst::Sub:
+  case AtomicRMWInst::Or:
+  case AtomicRMWInst::Xor: {
+    // Atomic sub/or/xor do not work over PCI express, but atomic add
+    // does. InstCombine transforms these with 0 to or, so undo that.
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arsenm wrote:

No, this is a codegen hook for the AtomicExpand pass. InstCombine does this transform and then we run the expand in codegen to undo it. Someone could also have written the code this way in the first place 

https://github.com/llvm/llvm-project/pull/87533