[llvm] [RISCV] Add a MIR pass to reassociate shXadd, add, and slli to form more shXadd. (PR #87544)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sat Apr 6 10:20:21 PDT 2024

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topperc wrote:

I believe I have this working in the MachineCombiner now. I'll post that version shortly.

https://github.com/llvm/llvm-project/pull/87544

Previous message: [llvm] [RISCV] Add a MIR pass to reassociate shXadd, add, and slli to form more shXadd. (PR #87544)
Next message: [llvm] [ValueTracking] Fix "getOperand() out of range!" assertion crash (PR #87482)
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