[llvm] [X86] Fix typo: QWORD alignment is greater than 4, not 8 (PR #87819)

[via llvm-commits]

https://github.com/AtariDreams created https://github.com/llvm/llvm-project/pull/87819

This probably inhibited a lot of optimizations. EmitTargetCodeForMemcpy does not have this problem, luckily.

>From ba5ef1bcf846bcea80e85f3e5012d57ac5b2838e Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Fri, 5 Apr 2024 14:36:32 -0400
Subject: [PATCH] [X86] Fix typo: QWORD alignment is greater than 4, not 8

This probably inhibited a lot of optimizations. EmitTargetCodeForMemcpy does not have this problem, luckily.
---
 llvm/lib/Target/X86/X86SelectionDAGInfo.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp b/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
index 7c630a2b0da080..bc5cb5934454ce 100644
--- a/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
+++ b/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
@@ -86,7 +86,7 @@ SDValue X86SelectionDAGInfo::EmitTargetCodeForMemset(
       ValReg = X86::EAX;
       Val = (Val << 8)  | Val;
       Val = (Val << 16) | Val;
-      if (Subtarget.is64Bit() && Alignment > Align(8)) { // QWORD aligned
+      if (Subtarget.is64Bit() && Alignment > Align(4)) { // QWORD aligned
         AVT = MVT::i64;
         ValReg = X86::RAX;
         Val = (Val << 32) | Val;