[lld] lld/AArch64: handle more relocation addends (PR #87328)

[Fangrui Song via llvm-commits]

================
@@ -225,6 +236,30 @@ int64_t AArch64::getImplicitAddend(const uint8_t *buf, RelType type) const {
   case R_AARCH64_IRELATIVE:
   case R_AARCH64_TLS_TPREL64:
     return read64(buf);
+  case R_AARCH64_MOVW_UABS_G0:
+  case R_AARCH64_MOVW_UABS_G0_NC:
+    return getBits(SignExtend64<32>(read32(buf)), 0, 15);
+  case R_AARCH64_MOVW_UABS_G1:
+  case R_AARCH64_MOVW_UABS_G1_NC:
+    return getBits(SignExtend64<32>(read32(buf)), 31, 16);
----------------
MaskRay wrote:

31, 16 is incorrect

https://github.com/llvm/llvm-project/pull/87328