[llvm] [RISCV][TTI] Scale the cost of FP-Int conversion with LMUL (PR #87506)
Shih-Po Hung via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 4 23:43:47 PDT 2024
https://github.com/arcbbb updated https://github.com/llvm/llvm-project/pull/87506
>From d87bb545b9a5c945f72d9d3d7dc6491cd406d09c Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Tue, 2 Apr 2024 09:08:08 -0700
Subject: [PATCH 1/2] [RISCV][TTI] Scale the cost of FP-Int conversion with
LMUL
Widening/narrowing the source data type to match the destination data
type may require multiple steps.
To model the costs, the patch generated the interim type by following
the logic in RISCVTargetLowering::lowerVPFPIntConvOp.
---
.../Target/RISCV/RISCVTargetTransformInfo.cpp | 115 +-
llvm/test/Analysis/CostModel/RISCV/cast.ll | 2216 ++++++++---------
2 files changed, 1203 insertions(+), 1128 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 38304ff90252f0..6ea17aa1130963 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -988,31 +988,106 @@ InstructionCost RISCVTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
return Cost;
}
case ISD::FP_TO_SINT:
- case ISD::FP_TO_UINT:
+ case ISD::FP_TO_UINT: {
+ unsigned IsSigned = ISD == ISD::FP_TO_SINT;
+ unsigned FCVT = IsSigned ? RISCV::VFCVT_RTZ_X_F_V : RISCV::VFCVT_RTZ_XU_F_V;
+ unsigned FWCVT =
+ IsSigned ? RISCV::VFWCVT_RTZ_X_F_V : RISCV::VFWCVT_RTZ_XU_F_V;
+ unsigned FNCVT =
+ IsSigned ? RISCV::VFNCVT_RTZ_X_F_W : RISCV::VFNCVT_RTZ_XU_F_W;
+ unsigned SrcEltSize = Src->getScalarSizeInBits();
+ unsigned DstEltSize = Dst->getScalarSizeInBits();
+ if (DstEltSize == 1) {
+ // For fp vector to mask, we use:
+ // vfncvt.rtz.x.f.w v9, v8
+ // vand.vi v8, v9, 1
+ // vmsne.vi v0, v8, 0
+ SrcEltSize /= 2;
+ MVT ElementVT = MVT::getIntegerVT(SrcEltSize);
+ MVT InterimVT = SrcLT.second.changeVectorElementType(ElementVT);
+ return getRISCVInstructionCost(FNCVT, InterimVT, CostKind) +
+ getRISCVInstructionCost({RISCV::VAND_VI, RISCV::VMSNE_VI},
+ DstLT.second, CostKind);
+ }
+ if (DstEltSize == SrcEltSize)
+ return getRISCVInstructionCost(FCVT, DstLT.second, CostKind);
+ if (DstEltSize == (2 * SrcEltSize))
+ return getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
+ if (DstEltSize == (4 * SrcEltSize) && (SrcEltSize == 16)) {
+ // Convert f16 to f32 then convert f32 to i64.
+ MVT VecF32VT = DstLT.second.changeVectorElementType(MVT::f32);
+ return getRISCVInstructionCost(RISCV::VFWCVT_F_F_V, VecF32VT, CostKind) +
+ getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
+ }
+ if (DstEltSize < SrcEltSize) {
+ SrcEltSize /= 2;
+ MVT ElementVT = MVT::getIntegerVT(SrcEltSize);
+ MVT InterimVT = DstLT.second.changeVectorElementType(ElementVT);
+ InstructionCost Cost =
+ getRISCVInstructionCost(FNCVT, InterimVT, CostKind);
+ while (DstEltSize < SrcEltSize) {
+ SrcEltSize /= 2;
+ ElementVT = MVT::getIntegerVT(SrcEltSize);
+ InterimVT = DstLT.second.changeVectorElementType(ElementVT);
+ Cost += getRISCVInstructionCost(RISCV::VNSRL_WI, InterimVT, CostKind);
+ }
+ return Cost;
+ }
+ return BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
+ }
case ISD::SINT_TO_FP:
- case ISD::UINT_TO_FP:
- if (Src->getScalarSizeInBits() == 1 || Dst->getScalarSizeInBits() == 1) {
- // The cost of convert from or to mask vector is different from other
- // cases. We could not use PowDiff to calculate it.
- // For mask vector to fp, we should use the following instructions:
+ case ISD::UINT_TO_FP: {
+ unsigned IsSigned = ISD == ISD::SINT_TO_FP;
+ unsigned FCVT = IsSigned ? RISCV::VFCVT_F_X_V : RISCV::VFCVT_F_XU_V;
+ unsigned FWCVT = IsSigned ? RISCV::VFWCVT_F_X_V : RISCV::VFWCVT_F_XU_V;
+ unsigned FNCVT = IsSigned ? RISCV::VFNCVT_F_X_W : RISCV::VFNCVT_F_XU_W;
+ unsigned SrcEltSize = Src->getScalarSizeInBits();
+ unsigned DstEltSize = Dst->getScalarSizeInBits();
+
+ if (SrcEltSize == 1) {
+ // For mask vector to fp, we use:
// vmv.v.i v8, 0
// vmerge.vim v8, v8, -1, v0
- // vfcvt.f.x.v v8, v8
+ // vfwcvt.f.x.v v8, v8
+ MVT ElementVT = MVT::getIntegerVT(DstEltSize >> 1);
+ MVT VecHalfVT = DstLT.second.changeVectorElementType(ElementVT);
+ return getRISCVInstructionCost({RISCV::VMV_V_I, RISCV::VMERGE_VIM},
+ VecHalfVT, CostKind) +
+ getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
+ }
- // And for fp vector to mask, we use:
- // vfncvt.rtz.x.f.w v9, v8
- // vand.vi v8, v9, 1
- // vmsne.vi v0, v8, 0
- return 3;
+ if (DstEltSize == SrcEltSize)
+ return getRISCVInstructionCost(FCVT, DstLT.second, CostKind);
+
+ if (DstEltSize == (2 * SrcEltSize))
+ return getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
+
+ if (DstEltSize == (4 * SrcEltSize)) {
+ unsigned WidenIntOp = IsSigned ? RISCV::VSEXT_VF2 : RISCV::VZEXT_VF2;
+ MVT ElementVT = MVT::getIntegerVT(DstEltSize >> 1);
+ MVT VecVT = DstLT.second.changeVectorElementType(ElementVT);
+ return getRISCVInstructionCost(WidenIntOp, VecVT, CostKind) +
+ getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
}
- if (std::abs(PowDiff) <= 1)
- return 1;
- // Backend could lower (v[sz]ext i8 to double) to vfcvt(v[sz]ext.f8 i8),
- // so it only need two conversion.
- if (Src->isIntOrIntVectorTy())
- return 2;
- // Counts of narrow/widen instructions.
- return std::abs(PowDiff);
+ if (DstEltSize == (8 * SrcEltSize)) {
+ unsigned WidenIntOp = IsSigned ? RISCV::VSEXT_VF4 : RISCV::VZEXT_VF4;
+ MVT ElementVT = MVT::getIntegerVT(DstEltSize >> 1);
+ MVT VecVT = DstLT.second.changeVectorElementType(ElementVT);
+ return getRISCVInstructionCost(WidenIntOp, VecVT, CostKind) +
+ getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
+ }
+ if (SrcEltSize == (2 * DstEltSize))
+ return getRISCVInstructionCost(FNCVT, DstLT.second, CostKind);
+
+ if ((SrcEltSize == (4 * DstEltSize)) && (DstEltSize == 16)) {
+ // Handle i64 to f16: vfncvt.f.x/xu + vfncvt.f.f
+ MVT DstVT = DstLT.second.changeVectorElementType(MVT::f32);
+ return getRISCVInstructionCost(FNCVT, DstVT, CostKind) +
+ getRISCVInstructionCost(RISCV::VFNCVT_F_F_W, DstLT.second,
+ CostKind);
+ }
+ return BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
+ }
}
return BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
}
diff --git a/llvm/test/Analysis/CostModel/RISCV/cast.ll b/llvm/test/Analysis/CostModel/RISCV/cast.ll
index 6ddd57a24c51f5..616310b30d0da9 100644
--- a/llvm/test/Analysis/CostModel/RISCV/cast.ll
+++ b/llvm/test/Analysis/CostModel/RISCV/cast.ll
@@ -1725,87 +1725,87 @@ define void @fptosi() {
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i32 = fptosi <4 x float> undef to <4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i32 = fptosi <4 x double> undef to <4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i64 = fptosi <4 x float> undef to <4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i64 = fptosi <4 x double> undef to <4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i64 = fptosi <4 x float> undef to <4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i64 = fptosi <4 x double> undef to <4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f32_v4i1 = fptosi <4 x float> undef to <4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i1 = fptosi <4 x double> undef to <4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i8 = fptosi <8 x float> undef to <8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i8 = fptosi <8 x double> undef to <8 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i8 = fptosi <8 x double> undef to <8 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i16 = fptosi <8 x float> undef to <8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i16 = fptosi <8 x double> undef to <8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i32 = fptosi <8 x float> undef to <8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i32 = fptosi <8 x double> undef to <8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i64 = fptosi <8 x float> undef to <8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i64 = fptosi <8 x double> undef to <8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i16 = fptosi <8 x double> undef to <8 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i32 = fptosi <8 x float> undef to <8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i32 = fptosi <8 x double> undef to <8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f32_v8i64 = fptosi <8 x float> undef to <8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i64 = fptosi <8 x double> undef to <8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f32_v8i1 = fptosi <8 x float> undef to <8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i1 = fptosi <8 x double> undef to <8 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i1 = fptosi <8 x double> undef to <8 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i8 = fptosi <16 x float> undef to <16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i8 = fptosi <16 x double> undef to <16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i16 = fptosi <16 x float> undef to <16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f64_v16i16 = fptosi <16 x double> undef to <16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i32 = fptosi <16 x float> undef to <16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i32 = fptosi <16 x double> undef to <16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i64 = fptosi <16 x float> undef to <16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i64 = fptosi <16 x double> undef to <16 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i8 = fptosi <16 x float> undef to <16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v16f64_v16i8 = fptosi <16 x double> undef to <16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i16 = fptosi <16 x float> undef to <16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i16 = fptosi <16 x double> undef to <16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i32 = fptosi <16 x float> undef to <16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f64_v16i32 = fptosi <16 x double> undef to <16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f32_v16i64 = fptosi <16 x float> undef to <16 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f64_v16i64 = fptosi <16 x double> undef to <16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i1 = fptosi <16 x float> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i1 = fptosi <16 x double> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f32_v32i8 = fptosi <32 x float> undef to <32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i8 = fptosi <32 x double> undef to <32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i16 = fptosi <32 x float> undef to <32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32f64_v32i16 = fptosi <32 x double> undef to <32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i32 = fptosi <32 x float> undef to <32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f64_v32i32 = fptosi <32 x double> undef to <32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i64 = fptosi <32 x float> undef to <32 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i1 = fptosi <16 x float> undef to <16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i1 = fptosi <16 x double> undef to <16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i8 = fptosi <32 x float> undef to <32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v32f64_v32i8 = fptosi <32 x double> undef to <32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f32_v32i16 = fptosi <32 x float> undef to <32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i16 = fptosi <32 x double> undef to <32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f32_v32i32 = fptosi <32 x float> undef to <32 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32f64_v32i32 = fptosi <32 x double> undef to <32 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32f32_v32i64 = fptosi <32 x float> undef to <32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f64_v32i64 = fptosi <32 x double> undef to <32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i1 = fptosi <32 x float> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i1 = fptosi <32 x double> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v64f32_v64i8 = fptosi <64 x float> undef to <64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i8 = fptosi <64 x double> undef to <64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f32_v64i16 = fptosi <64 x float> undef to <64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64f64_v64i16 = fptosi <64 x double> undef to <64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i1 = fptosi <32 x float> undef to <32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i1 = fptosi <32 x double> undef to <32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i8 = fptosi <64 x float> undef to <64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v64f64_v64i8 = fptosi <64 x double> undef to <64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64f32_v64i16 = fptosi <64 x float> undef to <64 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i16 = fptosi <64 x double> undef to <64 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64f32_v64i32 = fptosi <64 x float> undef to <64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f64_v64i32 = fptosi <64 x double> undef to <64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f32_v64i64 = fptosi <64 x float> undef to <64 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64f64_v64i32 = fptosi <64 x double> undef to <64 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64f32_v64i64 = fptosi <64 x float> undef to <64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f64_v64i64 = fptosi <64 x double> undef to <64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v64f32_v64i1 = fptosi <64 x float> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i1 = fptosi <64 x double> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v128f32_v128i8 = fptosi <128 x float> undef to <128 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i8 = fptosi <128 x double> undef to <128 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i1 = fptosi <64 x float> undef to <64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i1 = fptosi <64 x double> undef to <64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i8 = fptosi <128 x float> undef to <128 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v128f64_v128i8 = fptosi <128 x double> undef to <128 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128f32_v128i16 = fptosi <128 x float> undef to <128 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128f64_v128i16 = fptosi <128 x double> undef to <128 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128f32_v128i16 = fptosi <128 x float> undef to <128 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128f64_v128i16 = fptosi <128 x double> undef to <128 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128f32_v128i32 = fptosi <128 x float> undef to <128 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128f64_v128i32 = fptosi <128 x double> undef to <128 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128f32_v128i64 = fptosi <128 x float> undef to <128 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128f64_v128i32 = fptosi <128 x double> undef to <128 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128f32_v128i64 = fptosi <128 x float> undef to <128 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v128f64_v128i64 = fptosi <128 x double> undef to <128 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v128f32_v128i1 = fptosi <128 x float> undef to <128 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i1 = fptosi <128 x double> undef to <128 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i1 = fptosi <128 x float> undef to <128 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %v128f64_v128i1 = fptosi <128 x double> undef to <128 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f32_nxv1i8 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i8 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i8>
@@ -1830,87 +1830,87 @@ define void @fptosi() {
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i32 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i32 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i64 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i64 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i64 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i64 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f32_nxv2i1 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i1 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i8 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i8 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i8 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i16 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i16 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i32 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_nxv4i32 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i64 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_nxv4i64 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i16 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i32 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i32 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f32_nxv4i64 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i64 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f32_nxv4i1 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i1 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i1 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i8 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f64_nxv8i8 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i16 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f64_nxv8i16 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i32 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_nxv8i32 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i64 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_nxv8i64 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i8 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv8f64_nxv8i8 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i16 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i16 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i32 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f64_nxv8i32 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f32_nxv8i64 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f64_nxv8i64 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i1 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f64_nxv8i1 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f32_nxv16i8 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16f64_nxv16i8 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_nxv16i16 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16f64_nxv16i16 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_nxv16i32 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f64_nxv16i32 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f32_nxv16i64 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i1 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i1 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f32_nxv16i8 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv16f64_nxv16i8 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f32_nxv16i16 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i16 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i32 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16f64_nxv16i32 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16f32_nxv16i64 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f64_nxv16i64 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f32_nxv16i1 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16f64_nxv16i1 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv32f32_nxv32i8 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32f64_nxv32i8 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f32_nxv32i16 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32f64_nxv32i16 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i1 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i1 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv32f32_nxv32i8 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv32f64_nxv32i8 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32f32_nxv32i16 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i16 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32f32_nxv32i32 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32f64_nxv32i32 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32f32_nxv32i64 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32f64_nxv32i32 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32f32_nxv32i64 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f64_nxv32i64 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv32f32_nxv32i1 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32f64_nxv32i1 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv64f32_nxv64i8 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64f64_nxv64i8 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f32_nxv32i1 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i1 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv64f32_nxv64i8 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv64f64_nxv64i8 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64f32_nxv64i16 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64f64_nxv64i16 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64f32_nxv64i16 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64f64_nxv64i16 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64f32_nxv64i32 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64f64_nxv64i32 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv64f32_nxv64i64 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64f64_nxv64i32 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 69 for instruction: %nxv64f32_nxv64i64 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f64_nxv64i64 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv64f32_nxv64i1 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64f64_nxv64i1 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %nxv64f32_nxv64i1 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64f64_nxv64i1 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; RV64-LABEL: 'fptosi'
@@ -1938,87 +1938,87 @@ define void @fptosi() {
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i32 = fptosi <4 x float> undef to <4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i32 = fptosi <4 x double> undef to <4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i64 = fptosi <4 x float> undef to <4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i64 = fptosi <4 x double> undef to <4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i64 = fptosi <4 x float> undef to <4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i64 = fptosi <4 x double> undef to <4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f32_v4i1 = fptosi <4 x float> undef to <4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i1 = fptosi <4 x double> undef to <4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i8 = fptosi <8 x float> undef to <8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i8 = fptosi <8 x double> undef to <8 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i8 = fptosi <8 x double> undef to <8 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i16 = fptosi <8 x float> undef to <8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i16 = fptosi <8 x double> undef to <8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i32 = fptosi <8 x float> undef to <8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i32 = fptosi <8 x double> undef to <8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i64 = fptosi <8 x float> undef to <8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i64 = fptosi <8 x double> undef to <8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i16 = fptosi <8 x double> undef to <8 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i32 = fptosi <8 x float> undef to <8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i32 = fptosi <8 x double> undef to <8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f32_v8i64 = fptosi <8 x float> undef to <8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i64 = fptosi <8 x double> undef to <8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f32_v8i1 = fptosi <8 x float> undef to <8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i1 = fptosi <8 x double> undef to <8 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i1 = fptosi <8 x double> undef to <8 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i8 = fptosi <16 x float> undef to <16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i8 = fptosi <16 x double> undef to <16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i16 = fptosi <16 x float> undef to <16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f64_v16i16 = fptosi <16 x double> undef to <16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i32 = fptosi <16 x float> undef to <16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i32 = fptosi <16 x double> undef to <16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i64 = fptosi <16 x float> undef to <16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i64 = fptosi <16 x double> undef to <16 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i8 = fptosi <16 x float> undef to <16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v16f64_v16i8 = fptosi <16 x double> undef to <16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i16 = fptosi <16 x float> undef to <16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i16 = fptosi <16 x double> undef to <16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i32 = fptosi <16 x float> undef to <16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f64_v16i32 = fptosi <16 x double> undef to <16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f32_v16i64 = fptosi <16 x float> undef to <16 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f64_v16i64 = fptosi <16 x double> undef to <16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i1 = fptosi <16 x float> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i1 = fptosi <16 x double> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f32_v32i8 = fptosi <32 x float> undef to <32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i8 = fptosi <32 x double> undef to <32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i16 = fptosi <32 x float> undef to <32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32f64_v32i16 = fptosi <32 x double> undef to <32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i32 = fptosi <32 x float> undef to <32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f64_v32i32 = fptosi <32 x double> undef to <32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i64 = fptosi <32 x float> undef to <32 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i1 = fptosi <16 x float> undef to <16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i1 = fptosi <16 x double> undef to <16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i8 = fptosi <32 x float> undef to <32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v32f64_v32i8 = fptosi <32 x double> undef to <32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f32_v32i16 = fptosi <32 x float> undef to <32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i16 = fptosi <32 x double> undef to <32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f32_v32i32 = fptosi <32 x float> undef to <32 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32f64_v32i32 = fptosi <32 x double> undef to <32 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32f32_v32i64 = fptosi <32 x float> undef to <32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f64_v32i64 = fptosi <32 x double> undef to <32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i1 = fptosi <32 x float> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i1 = fptosi <32 x double> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v64f32_v64i8 = fptosi <64 x float> undef to <64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i8 = fptosi <64 x double> undef to <64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f32_v64i16 = fptosi <64 x float> undef to <64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64f64_v64i16 = fptosi <64 x double> undef to <64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i1 = fptosi <32 x float> undef to <32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i1 = fptosi <32 x double> undef to <32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i8 = fptosi <64 x float> undef to <64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v64f64_v64i8 = fptosi <64 x double> undef to <64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64f32_v64i16 = fptosi <64 x float> undef to <64 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i16 = fptosi <64 x double> undef to <64 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64f32_v64i32 = fptosi <64 x float> undef to <64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f64_v64i32 = fptosi <64 x double> undef to <64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f32_v64i64 = fptosi <64 x float> undef to <64 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64f64_v64i32 = fptosi <64 x double> undef to <64 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64f32_v64i64 = fptosi <64 x float> undef to <64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f64_v64i64 = fptosi <64 x double> undef to <64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v64f32_v64i1 = fptosi <64 x float> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i1 = fptosi <64 x double> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v128f32_v128i8 = fptosi <128 x float> undef to <128 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i8 = fptosi <128 x double> undef to <128 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i1 = fptosi <64 x float> undef to <64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i1 = fptosi <64 x double> undef to <64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i8 = fptosi <128 x float> undef to <128 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v128f64_v128i8 = fptosi <128 x double> undef to <128 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128f32_v128i16 = fptosi <128 x float> undef to <128 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128f64_v128i16 = fptosi <128 x double> undef to <128 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128f32_v128i16 = fptosi <128 x float> undef to <128 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128f64_v128i16 = fptosi <128 x double> undef to <128 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128f32_v128i32 = fptosi <128 x float> undef to <128 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128f64_v128i32 = fptosi <128 x double> undef to <128 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128f32_v128i64 = fptosi <128 x float> undef to <128 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128f64_v128i32 = fptosi <128 x double> undef to <128 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128f32_v128i64 = fptosi <128 x float> undef to <128 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v128f64_v128i64 = fptosi <128 x double> undef to <128 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v128f32_v128i1 = fptosi <128 x float> undef to <128 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i1 = fptosi <128 x double> undef to <128 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i1 = fptosi <128 x float> undef to <128 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %v128f64_v128i1 = fptosi <128 x double> undef to <128 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f32_nxv1i8 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i8 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i8>
@@ -2043,87 +2043,87 @@ define void @fptosi() {
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i32 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i32 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i64 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i64 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i64 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i64 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f32_nxv2i1 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i1 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i8 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i8 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i8 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i16 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i16 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i32 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_nxv4i32 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i64 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_nxv4i64 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i16 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i32 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i32 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f32_nxv4i64 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i64 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f32_nxv4i1 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i1 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i1 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i8 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f64_nxv8i8 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i16 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f64_nxv8i16 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i32 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_nxv8i32 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i64 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_nxv8i64 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i8 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv8f64_nxv8i8 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i16 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i16 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i32 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f64_nxv8i32 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f32_nxv8i64 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f64_nxv8i64 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i1 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f64_nxv8i1 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f32_nxv16i8 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16f64_nxv16i8 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_nxv16i16 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16f64_nxv16i16 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_nxv16i32 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f64_nxv16i32 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f32_nxv16i64 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i1 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i1 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f32_nxv16i8 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv16f64_nxv16i8 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f32_nxv16i16 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i16 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i32 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16f64_nxv16i32 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16f32_nxv16i64 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f64_nxv16i64 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f32_nxv16i1 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16f64_nxv16i1 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv32f32_nxv32i8 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32f64_nxv32i8 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f32_nxv32i16 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32f64_nxv32i16 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i1 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i1 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv32f32_nxv32i8 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv32f64_nxv32i8 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32f32_nxv32i16 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i16 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32f32_nxv32i32 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32f64_nxv32i32 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32f32_nxv32i64 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32f64_nxv32i32 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32f32_nxv32i64 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f64_nxv32i64 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv32f32_nxv32i1 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32f64_nxv32i1 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv64f32_nxv64i8 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64f64_nxv64i8 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f32_nxv32i1 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i1 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv64f32_nxv64i8 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv64f64_nxv64i8 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64f32_nxv64i16 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64f64_nxv64i16 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64f32_nxv64i16 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64f64_nxv64i16 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64f32_nxv64i32 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64f64_nxv64i32 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64f32_nxv64i64 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64f64_nxv64i32 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64f32_nxv64i64 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv64f64_nxv64i64 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv64f32_nxv64i1 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64f64_nxv64i1 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %nxv64f32_nxv64i1 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64f64_nxv64i1 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
%v2f16_v2i8 = fptosi <2 x half> undef to <2 x i8>
@@ -2379,87 +2379,87 @@ define void @fptoui() {
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i32 = fptoui <4 x float> undef to <4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i32 = fptoui <4 x double> undef to <4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i64 = fptoui <4 x float> undef to <4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i64 = fptoui <4 x double> undef to <4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i64 = fptoui <4 x float> undef to <4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i64 = fptoui <4 x double> undef to <4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f32_v4i1 = fptoui <4 x float> undef to <4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i1 = fptoui <4 x double> undef to <4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i8 = fptoui <8 x float> undef to <8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i8 = fptoui <8 x double> undef to <8 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i8 = fptoui <8 x double> undef to <8 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i16 = fptoui <8 x float> undef to <8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i16 = fptoui <8 x double> undef to <8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i32 = fptoui <8 x float> undef to <8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i32 = fptoui <8 x double> undef to <8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i64 = fptoui <8 x float> undef to <8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i64 = fptoui <8 x double> undef to <8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i16 = fptoui <8 x double> undef to <8 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i32 = fptoui <8 x float> undef to <8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i32 = fptoui <8 x double> undef to <8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f32_v8i64 = fptoui <8 x float> undef to <8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i64 = fptoui <8 x double> undef to <8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f32_v8i1 = fptoui <8 x float> undef to <8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i1 = fptoui <8 x double> undef to <8 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i1 = fptoui <8 x double> undef to <8 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i8 = fptoui <16 x float> undef to <16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i8 = fptoui <16 x double> undef to <16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i16 = fptoui <16 x float> undef to <16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f64_v16i16 = fptoui <16 x double> undef to <16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i32 = fptoui <16 x float> undef to <16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i32 = fptoui <16 x double> undef to <16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i64 = fptoui <16 x float> undef to <16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i64 = fptoui <16 x double> undef to <16 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i8 = fptoui <16 x float> undef to <16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v16f64_v16i8 = fptoui <16 x double> undef to <16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i16 = fptoui <16 x float> undef to <16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i16 = fptoui <16 x double> undef to <16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i32 = fptoui <16 x float> undef to <16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f64_v16i32 = fptoui <16 x double> undef to <16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f32_v16i64 = fptoui <16 x float> undef to <16 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f64_v16i64 = fptoui <16 x double> undef to <16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i1 = fptoui <16 x float> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i1 = fptoui <16 x double> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f32_v32i8 = fptoui <32 x float> undef to <32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i8 = fptoui <32 x double> undef to <32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i16 = fptoui <32 x float> undef to <32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32f64_v32i16 = fptoui <32 x double> undef to <32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i32 = fptoui <32 x float> undef to <32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f64_v32i32 = fptoui <32 x double> undef to <32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i64 = fptoui <32 x float> undef to <32 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i1 = fptoui <16 x float> undef to <16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i1 = fptoui <16 x double> undef to <16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i8 = fptoui <32 x float> undef to <32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v32f64_v32i8 = fptoui <32 x double> undef to <32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f32_v32i16 = fptoui <32 x float> undef to <32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i16 = fptoui <32 x double> undef to <32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f32_v32i32 = fptoui <32 x float> undef to <32 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32f64_v32i32 = fptoui <32 x double> undef to <32 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32f32_v32i64 = fptoui <32 x float> undef to <32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f64_v32i64 = fptoui <32 x double> undef to <32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i1 = fptoui <32 x float> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i1 = fptoui <32 x double> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v64f32_v64i8 = fptoui <64 x float> undef to <64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i8 = fptoui <64 x double> undef to <64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f32_v64i16 = fptoui <64 x float> undef to <64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64f64_v64i16 = fptoui <64 x double> undef to <64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i1 = fptoui <32 x float> undef to <32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i1 = fptoui <32 x double> undef to <32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i8 = fptoui <64 x float> undef to <64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v64f64_v64i8 = fptoui <64 x double> undef to <64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64f32_v64i16 = fptoui <64 x float> undef to <64 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i16 = fptoui <64 x double> undef to <64 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64f32_v64i32 = fptoui <64 x float> undef to <64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f64_v64i32 = fptoui <64 x double> undef to <64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f32_v64i64 = fptoui <64 x float> undef to <64 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64f64_v64i32 = fptoui <64 x double> undef to <64 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64f32_v64i64 = fptoui <64 x float> undef to <64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f64_v64i64 = fptoui <64 x double> undef to <64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v64f32_v64i1 = fptoui <64 x float> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i1 = fptoui <64 x double> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v128f32_v128i8 = fptoui <128 x float> undef to <128 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i8 = fptoui <128 x double> undef to <128 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i1 = fptoui <64 x float> undef to <64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i1 = fptoui <64 x double> undef to <64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i8 = fptoui <128 x float> undef to <128 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v128f64_v128i8 = fptoui <128 x double> undef to <128 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128f32_v128i16 = fptoui <128 x float> undef to <128 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128f64_v128i16 = fptoui <128 x double> undef to <128 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128f32_v128i16 = fptoui <128 x float> undef to <128 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128f64_v128i16 = fptoui <128 x double> undef to <128 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128f32_v128i32 = fptoui <128 x float> undef to <128 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128f64_v128i32 = fptoui <128 x double> undef to <128 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128f32_v128i64 = fptoui <128 x float> undef to <128 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128f64_v128i32 = fptoui <128 x double> undef to <128 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128f32_v128i64 = fptoui <128 x float> undef to <128 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v128f64_v128i64 = fptoui <128 x double> undef to <128 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v128f32_v128i1 = fptoui <128 x float> undef to <128 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i1 = fptoui <128 x double> undef to <128 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i1 = fptoui <128 x float> undef to <128 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %v128f64_v128i1 = fptoui <128 x double> undef to <128 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f32_nxv1i8 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i8 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i8>
@@ -2484,87 +2484,87 @@ define void @fptoui() {
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i32 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i32 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i64 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i64 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i64 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i64 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f32_nxv2i1 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i1 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i8 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i8 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i8 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i16 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i16 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i32 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_nxv4i32 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i64 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_nxv4i64 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i16 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i32 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i32 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f32_nxv4i64 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i64 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f32_nxv4i1 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i1 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i1 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i8 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f64_nxv8i8 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i16 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f64_nxv8i16 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i32 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_nxv8i32 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i64 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_nxv8i64 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i8 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv8f64_nxv8i8 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i16 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i16 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i32 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f64_nxv8i32 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f32_nxv8i64 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f64_nxv8i64 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i1 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f64_nxv8i1 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f32_nxv16i8 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16f64_nxv16i8 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_nxv16i16 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16f64_nxv16i16 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_nxv16i32 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f64_nxv16i32 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f32_nxv16i64 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i1 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i1 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f32_nxv16i8 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv16f64_nxv16i8 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f32_nxv16i16 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i16 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i32 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16f64_nxv16i32 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16f32_nxv16i64 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f64_nxv16i64 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f32_nxv16i1 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16f64_nxv16i1 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv32f32_nxv32i8 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32f64_nxv32i8 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f32_nxv32i16 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32f64_nxv32i16 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i1 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i1 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv32f32_nxv32i8 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv32f64_nxv32i8 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32f32_nxv32i16 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i16 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32f32_nxv32i32 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32f64_nxv32i32 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32f32_nxv32i64 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32f64_nxv32i32 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32f32_nxv32i64 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f64_nxv32i64 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv32f32_nxv32i1 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32f64_nxv32i1 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv64f32_nxv64i8 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64f64_nxv64i8 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f32_nxv32i1 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i1 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv64f32_nxv64i8 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv64f64_nxv64i8 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64f32_nxv64i16 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64f64_nxv64i16 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64f32_nxv64i16 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64f64_nxv64i16 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i16>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64f32_nxv64i32 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64f64_nxv64i32 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv64f32_nxv64i64 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64f64_nxv64i32 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i32>
+; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV32-NEXT: Cost Model: Found an estimated cost of 69 for instruction: %nxv64f32_nxv64i64 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f64_nxv64i64 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv64f32_nxv64i1 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64f64_nxv64i1 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %nxv64f32_nxv64i1 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64f64_nxv64i1 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; RV64-LABEL: 'fptoui'
@@ -2592,87 +2592,87 @@ define void @fptoui() {
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i32 = fptoui <4 x float> undef to <4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i32 = fptoui <4 x double> undef to <4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i64 = fptoui <4 x float> undef to <4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i64 = fptoui <4 x double> undef to <4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i64 = fptoui <4 x float> undef to <4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i64 = fptoui <4 x double> undef to <4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f32_v4i1 = fptoui <4 x float> undef to <4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i1 = fptoui <4 x double> undef to <4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i8 = fptoui <8 x float> undef to <8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i8 = fptoui <8 x double> undef to <8 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i8 = fptoui <8 x double> undef to <8 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i16 = fptoui <8 x float> undef to <8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i16 = fptoui <8 x double> undef to <8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i32 = fptoui <8 x float> undef to <8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i32 = fptoui <8 x double> undef to <8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i64 = fptoui <8 x float> undef to <8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_v8i64 = fptoui <8 x double> undef to <8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i16 = fptoui <8 x double> undef to <8 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i32 = fptoui <8 x float> undef to <8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i32 = fptoui <8 x double> undef to <8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f32_v8i64 = fptoui <8 x float> undef to <8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i64 = fptoui <8 x double> undef to <8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f32_v8i1 = fptoui <8 x float> undef to <8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i1 = fptoui <8 x double> undef to <8 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i1 = fptoui <8 x double> undef to <8 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i8 = fptoui <16 x float> undef to <16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i8 = fptoui <16 x double> undef to <16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i16 = fptoui <16 x float> undef to <16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f64_v16i16 = fptoui <16 x double> undef to <16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i32 = fptoui <16 x float> undef to <16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i32 = fptoui <16 x double> undef to <16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_v16i64 = fptoui <16 x float> undef to <16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f64_v16i64 = fptoui <16 x double> undef to <16 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i8 = fptoui <16 x float> undef to <16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v16f64_v16i8 = fptoui <16 x double> undef to <16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i16 = fptoui <16 x float> undef to <16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i16 = fptoui <16 x double> undef to <16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i32 = fptoui <16 x float> undef to <16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f64_v16i32 = fptoui <16 x double> undef to <16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f32_v16i64 = fptoui <16 x float> undef to <16 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f64_v16i64 = fptoui <16 x double> undef to <16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i1 = fptoui <16 x float> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f64_v16i1 = fptoui <16 x double> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f32_v32i8 = fptoui <32 x float> undef to <32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i8 = fptoui <32 x double> undef to <32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i16 = fptoui <32 x float> undef to <32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32f64_v32i16 = fptoui <32 x double> undef to <32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32f32_v32i32 = fptoui <32 x float> undef to <32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f64_v32i32 = fptoui <32 x double> undef to <32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i64 = fptoui <32 x float> undef to <32 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i1 = fptoui <16 x float> undef to <16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i1 = fptoui <16 x double> undef to <16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i8 = fptoui <32 x float> undef to <32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v32f64_v32i8 = fptoui <32 x double> undef to <32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f32_v32i16 = fptoui <32 x float> undef to <32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i16 = fptoui <32 x double> undef to <32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f32_v32i32 = fptoui <32 x float> undef to <32 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32f64_v32i32 = fptoui <32 x double> undef to <32 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32f32_v32i64 = fptoui <32 x float> undef to <32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f64_v32i64 = fptoui <32 x double> undef to <32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32f32_v32i1 = fptoui <32 x float> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32f64_v32i1 = fptoui <32 x double> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v64f32_v64i8 = fptoui <64 x float> undef to <64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i8 = fptoui <64 x double> undef to <64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f32_v64i16 = fptoui <64 x float> undef to <64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64f64_v64i16 = fptoui <64 x double> undef to <64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i1 = fptoui <32 x float> undef to <32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i1 = fptoui <32 x double> undef to <32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i8 = fptoui <64 x float> undef to <64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v64f64_v64i8 = fptoui <64 x double> undef to <64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64f32_v64i16 = fptoui <64 x float> undef to <64 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i16 = fptoui <64 x double> undef to <64 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64f32_v64i32 = fptoui <64 x float> undef to <64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f64_v64i32 = fptoui <64 x double> undef to <64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f32_v64i64 = fptoui <64 x float> undef to <64 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64f64_v64i32 = fptoui <64 x double> undef to <64 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64f32_v64i64 = fptoui <64 x float> undef to <64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f64_v64i64 = fptoui <64 x double> undef to <64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v64f32_v64i1 = fptoui <64 x float> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64f64_v64i1 = fptoui <64 x double> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v128f32_v128i8 = fptoui <128 x float> undef to <128 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i8 = fptoui <128 x double> undef to <128 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i1 = fptoui <64 x float> undef to <64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i1 = fptoui <64 x double> undef to <64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i8 = fptoui <128 x float> undef to <128 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v128f64_v128i8 = fptoui <128 x double> undef to <128 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128f32_v128i16 = fptoui <128 x float> undef to <128 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128f64_v128i16 = fptoui <128 x double> undef to <128 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128f32_v128i16 = fptoui <128 x float> undef to <128 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128f64_v128i16 = fptoui <128 x double> undef to <128 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128f32_v128i32 = fptoui <128 x float> undef to <128 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128f64_v128i32 = fptoui <128 x double> undef to <128 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128f32_v128i64 = fptoui <128 x float> undef to <128 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128f64_v128i32 = fptoui <128 x double> undef to <128 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128f32_v128i64 = fptoui <128 x float> undef to <128 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v128f64_v128i64 = fptoui <128 x double> undef to <128 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v128f32_v128i1 = fptoui <128 x float> undef to <128 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128f64_v128i1 = fptoui <128 x double> undef to <128 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i1 = fptoui <128 x float> undef to <128 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %v128f64_v128i1 = fptoui <128 x double> undef to <128 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f32_nxv1i8 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i8 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i8>
@@ -2697,87 +2697,87 @@ define void @fptoui() {
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i32 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i32 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i64 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i64 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i64 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i64 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f32_nxv2i1 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i1 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i8 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i8 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i8 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i16 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i16 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i32 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_nxv4i32 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i64 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_nxv4i64 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i16 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i32 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i32 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f32_nxv4i64 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i64 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f32_nxv4i1 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i1 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i1 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i8 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f64_nxv8i8 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i16 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f64_nxv8i16 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i32 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_nxv8i32 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_nxv8i64 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_nxv8i64 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i8 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv8f64_nxv8i8 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i16 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i16 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i32 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f64_nxv8i32 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f32_nxv8i64 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f64_nxv8i64 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i1 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f64_nxv8i1 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f32_nxv16i8 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16f64_nxv16i8 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_nxv16i16 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16f64_nxv16i16 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_nxv16i32 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f64_nxv16i32 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f32_nxv16i64 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i1 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i1 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f32_nxv16i8 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv16f64_nxv16i8 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f32_nxv16i16 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i16 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i32 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16f64_nxv16i32 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16f32_nxv16i64 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f64_nxv16i64 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16f32_nxv16i1 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16f64_nxv16i1 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv32f32_nxv32i8 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32f64_nxv32i8 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f32_nxv32i16 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32f64_nxv32i16 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i1 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i1 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv32f32_nxv32i8 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv32f64_nxv32i8 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32f32_nxv32i16 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i16 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32f32_nxv32i32 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32f64_nxv32i32 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32f32_nxv32i64 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32f64_nxv32i32 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32f32_nxv32i64 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f64_nxv32i64 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv32f32_nxv32i1 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32f64_nxv32i1 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv64f32_nxv64i8 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64f64_nxv64i8 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f32_nxv32i1 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i1 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv64f32_nxv64i8 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv64f64_nxv64i8 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64f32_nxv64i16 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64f64_nxv64i16 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64f32_nxv64i16 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64f64_nxv64i16 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i16>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64f32_nxv64i32 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64f64_nxv64i32 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64f32_nxv64i64 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64f64_nxv64i32 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i32>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64f32_nxv64i64 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv64f64_nxv64i64 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv64f32_nxv64i1 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64f64_nxv64i1 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %nxv64f32_nxv64i1 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64f64_nxv64i1 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
%v2f16_v2i8 = fptoui <2 x half> undef to <2 x i8>
@@ -3026,94 +3026,94 @@ define void @sitofp() {
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f64 = sitofp <2 x i1> undef to <2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f32 = sitofp <4 x i8> undef to <4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f64 = sitofp <4 x i8> undef to <4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i8_v4f64 = sitofp <4 x i8> undef to <4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f32 = sitofp <4 x i16> undef to <4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16_v4f64 = sitofp <4 x i16> undef to <4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i16_v4f64 = sitofp <4 x i16> undef to <4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f32 = sitofp <4 x i32> undef to <4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f64 = sitofp <4 x i32> undef to <4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i32_v4f64 = sitofp <4 x i32> undef to <4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_v4f32 = sitofp <4 x i64> undef to <4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f64 = sitofp <4 x i16> undef to <4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f64 = sitofp <4 x i16> undef to <4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f32 = sitofp <4 x i1> undef to <4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f64 = sitofp <4 x i1> undef to <4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i1_v4f64 = sitofp <4 x i1> undef to <4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f32 = sitofp <8 x i8> undef to <8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f64 = sitofp <8 x i8> undef to <8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i8_v8f32 = sitofp <8 x i8> undef to <8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i8_v8f64 = sitofp <8 x i8> undef to <8 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f32 = sitofp <8 x i16> undef to <8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f64 = sitofp <8 x i16> undef to <8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f32 = sitofp <8 x i16> undef to <8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i16_v8f64 = sitofp <8 x i16> undef to <8 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f32 = sitofp <8 x i32> undef to <8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f64 = sitofp <8 x i32> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i64_v8f32 = sitofp <8 x i64> undef to <8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f64 = sitofp <8 x i16> undef to <8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i32_v8f32 = sitofp <8 x i32> undef to <8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i32_v8f64 = sitofp <8 x i32> undef to <8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f32 = sitofp <8 x i64> undef to <8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i64_v8f64 = sitofp <8 x i16> undef to <8 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f32 = sitofp <8 x i1> undef to <8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f64 = sitofp <8 x i1> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f32 = sitofp <16 x i8> undef to <16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f64 = sitofp <16 x i8> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f32 = sitofp <16 x i16> undef to <16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f64 = sitofp <16 x i16> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f32 = sitofp <16 x i32> undef to <16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f64 = sitofp <16 x i32> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i64_v16f32 = sitofp <16 x i64> undef to <16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f64 = sitofp <16 x i16> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f32 = sitofp <16 x i1> undef to <16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f64 = sitofp <16 x i1> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32i8_v32f32 = sitofp <32 x i8> undef to <32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i8_v32f64 = sitofp <32 x i8> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f32 = sitofp <32 x i16> undef to <32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i16_v32f64 = sitofp <32 x i16> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f32 = sitofp <32 x i32> undef to <32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i32_v32f64 = sitofp <32 x i32> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i64_v32f32 = sitofp <32 x i64> undef to <32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f64 = sitofp <32 x i16> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f32 = sitofp <32 x i1> undef to <32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32i1_v32f64 = sitofp <32 x i1> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v64i8_v64f32 = sitofp <64 x i8> undef to <64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i8_v64f64 = sitofp <64 x i8> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i16_v64f32 = sitofp <64 x i16> undef to <64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i16_v64f64 = sitofp <64 x i16> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64i32_v64f32 = sitofp <64 x i32> undef to <64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64i32_v64f64 = sitofp <64 x i32> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64i64_v64f32 = sitofp <64 x i64> undef to <64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f64 = sitofp <64 x i16> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v64i1_v64f32 = sitofp <64 x i1> undef to <64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64i1_v64f64 = sitofp <64 x i1> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v128i8_v128f32 = sitofp <128 x i8> undef to <128 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v128i8_v128f64 = sitofp <128 x i8> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128i16_v128f32 = sitofp <128 x i16> undef to <128 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i16_v128f64 = sitofp <128 x i16> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128i32_v128f32 = sitofp <128 x i32> undef to <128 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128i32_v128f64 = sitofp <128 x i32> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128i64_v128f32 = sitofp <128 x i64> undef to <128 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f64 = sitofp <128 x i16> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v128i1_v128f32 = sitofp <128 x i1> undef to <128 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128i1_v128f64 = sitofp <128 x i1> undef to <128 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i1_v8f32 = sitofp <8 x i1> undef to <8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i1_v8f64 = sitofp <8 x i1> undef to <8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i8_v16f32 = sitofp <16 x i8> undef to <16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i8_v16f64 = sitofp <16 x i8> undef to <16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i16_v16f32 = sitofp <16 x i16> undef to <16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i16_v16f64 = sitofp <16 x i16> undef to <16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i32_v16f32 = sitofp <16 x i32> undef to <16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i32_v16f64 = sitofp <16 x i32> undef to <16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i64_v16f32 = sitofp <16 x i64> undef to <16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i64_v16f64 = sitofp <16 x i16> undef to <16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i1_v16f32 = sitofp <16 x i1> undef to <16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16i1_v16f64 = sitofp <16 x i1> undef to <16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32i8_v32f32 = sitofp <32 x i8> undef to <32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i8_v32f64 = sitofp <32 x i8> undef to <32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i16_v32f32 = sitofp <32 x i16> undef to <32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i16_v32f64 = sitofp <32 x i16> undef to <32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i32_v32f32 = sitofp <32 x i32> undef to <32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32i32_v32f64 = sitofp <32 x i32> undef to <32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32i64_v32f32 = sitofp <32 x i64> undef to <32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i64_v32f64 = sitofp <32 x i16> undef to <32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v32i1_v32f32 = sitofp <32 x i1> undef to <32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i1_v32f64 = sitofp <32 x i1> undef to <32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64i8_v64f32 = sitofp <64 x i8> undef to <64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i8_v64f64 = sitofp <64 x i8> undef to <64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64i16_v64f32 = sitofp <64 x i16> undef to <64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i16_v64f64 = sitofp <64 x i16> undef to <64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i32_v64f32 = sitofp <64 x i32> undef to <64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64i32_v64f64 = sitofp <64 x i32> undef to <64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64i64_v64f32 = sitofp <64 x i64> undef to <64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i64_v64f64 = sitofp <64 x i16> undef to <64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v64i1_v64f32 = sitofp <64 x i1> undef to <64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64i1_v64f64 = sitofp <64 x i1> undef to <64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128i8_v128f32 = sitofp <128 x i8> undef to <128 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128i8_v128f64 = sitofp <128 x i8> undef to <128 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128i16_v128f32 = sitofp <128 x i16> undef to <128 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i16_v128f64 = sitofp <128 x i16> undef to <128 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v128i32_v128f32 = sitofp <128 x i32> undef to <128 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128i32_v128f64 = sitofp <128 x i32> undef to <128 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128i64_v128f32 = sitofp <128 x i64> undef to <128 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i64_v128f64 = sitofp <128 x i16> undef to <128 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v128i1_v128f32 = sitofp <128 x i1> undef to <128 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %v128i1_v128f64 = sitofp <128 x i1> undef to <128 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f32 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f64 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x double>
@@ -3131,94 +3131,94 @@ define void @sitofp() {
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f64 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f32 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f64 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i8_nxv2f64 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f32 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i16_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i16_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f32 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f64 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i32_nxv2f64 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f16 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_nxv2f32 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f32 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f64 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i1_nxv2f64 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i8_nxv4f32 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i8_nxv4f64 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i8_nxv4f32 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i8_nxv4f64 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f32 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f32 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i16_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f32 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f64 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i64_nxv4f32 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i32_nxv4f32 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i32_nxv4f64 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f32 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i64_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f32 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f64 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f32 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f64 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_nxv8f32 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f32 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f64 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i64_nxv8f32 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f32 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f64 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16i8_nxv16f32 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i8_nxv16f64 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_nxv16f32 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i16_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_nxv16f32 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i32_nxv16f64 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i64_nxv16f32 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i64_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i1_nxv16f32 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16i1_nxv16f64 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv32i8_nxv32f32 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i8_nxv32f64 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i16_nxv32f32 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i16_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i1_nxv4f32 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4i1_nxv4f64 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i8_nxv8f32 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i8_nxv8f64 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i16_nxv8f32 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i16_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i32_nxv8f32 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i32_nxv8f64 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i64_nxv8f32 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i64_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i1_nxv8f32 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8i1_nxv8f64 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16i8_nxv16f32 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i8_nxv16f64 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i16_nxv16f32 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i16_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i32_nxv16f32 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16i32_nxv16f64 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16i64_nxv16f32 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i64_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv16i1_nxv16f32 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i1_nxv16f64 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32i8_nxv32f32 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i8_nxv32f64 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32i16_nxv32f32 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i16_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32i32_nxv32f32 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32i32_nxv32f64 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32i64_nxv32f32 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i64_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv32i1_nxv32f32 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32i1_nxv32f64 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv64i8_nxv64f32 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %nxv64i8_nxv64f64 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32i32_nxv32f64 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32i64_nxv32f32 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i64_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv32i1_nxv32f32 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32i1_nxv32f64 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64i8_nxv64f32 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64i8_nxv64f64 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64i16_nxv64f32 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64i16_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64i16_nxv64f32 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i16_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64i32_nxv64f32 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64i32_nxv64f64 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv64i64_nxv64f32 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64i64_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv64i1_nxv64f32 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64i1_nxv64f64 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64i32_nxv64f64 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 37 for instruction: %nxv64i64_nxv64f32 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i64_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv64i1_nxv64f32 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64i1_nxv64f64 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; RV64-LABEL: 'sitofp'
@@ -3239,94 +3239,94 @@ define void @sitofp() {
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f64 = sitofp <2 x i1> undef to <2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f32 = sitofp <4 x i8> undef to <4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f64 = sitofp <4 x i8> undef to <4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i8_v4f64 = sitofp <4 x i8> undef to <4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f32 = sitofp <4 x i16> undef to <4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16_v4f64 = sitofp <4 x i16> undef to <4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i16_v4f64 = sitofp <4 x i16> undef to <4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f32 = sitofp <4 x i32> undef to <4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f64 = sitofp <4 x i32> undef to <4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i32_v4f64 = sitofp <4 x i32> undef to <4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_v4f32 = sitofp <4 x i64> undef to <4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f64 = sitofp <4 x i16> undef to <4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f64 = sitofp <4 x i16> undef to <4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f32 = sitofp <4 x i1> undef to <4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f64 = sitofp <4 x i1> undef to <4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i1_v4f64 = sitofp <4 x i1> undef to <4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f32 = sitofp <8 x i8> undef to <8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f64 = sitofp <8 x i8> undef to <8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i8_v8f32 = sitofp <8 x i8> undef to <8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i8_v8f64 = sitofp <8 x i8> undef to <8 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f32 = sitofp <8 x i16> undef to <8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f64 = sitofp <8 x i16> undef to <8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f32 = sitofp <8 x i16> undef to <8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i16_v8f64 = sitofp <8 x i16> undef to <8 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f32 = sitofp <8 x i32> undef to <8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f64 = sitofp <8 x i32> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i64_v8f32 = sitofp <8 x i64> undef to <8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f64 = sitofp <8 x i16> undef to <8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i32_v8f32 = sitofp <8 x i32> undef to <8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i32_v8f64 = sitofp <8 x i32> undef to <8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f32 = sitofp <8 x i64> undef to <8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i64_v8f64 = sitofp <8 x i16> undef to <8 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f32 = sitofp <8 x i1> undef to <8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f64 = sitofp <8 x i1> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f32 = sitofp <16 x i8> undef to <16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f64 = sitofp <16 x i8> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f32 = sitofp <16 x i16> undef to <16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f64 = sitofp <16 x i16> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f32 = sitofp <16 x i32> undef to <16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f64 = sitofp <16 x i32> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i64_v16f32 = sitofp <16 x i64> undef to <16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f64 = sitofp <16 x i16> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f32 = sitofp <16 x i1> undef to <16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f64 = sitofp <16 x i1> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32i8_v32f32 = sitofp <32 x i8> undef to <32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i8_v32f64 = sitofp <32 x i8> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f32 = sitofp <32 x i16> undef to <32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i16_v32f64 = sitofp <32 x i16> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f32 = sitofp <32 x i32> undef to <32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i32_v32f64 = sitofp <32 x i32> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i64_v32f32 = sitofp <32 x i64> undef to <32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f64 = sitofp <32 x i16> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f32 = sitofp <32 x i1> undef to <32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32i1_v32f64 = sitofp <32 x i1> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v64i8_v64f32 = sitofp <64 x i8> undef to <64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i8_v64f64 = sitofp <64 x i8> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i16_v64f32 = sitofp <64 x i16> undef to <64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i16_v64f64 = sitofp <64 x i16> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64i32_v64f32 = sitofp <64 x i32> undef to <64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64i32_v64f64 = sitofp <64 x i32> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64i64_v64f32 = sitofp <64 x i64> undef to <64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f64 = sitofp <64 x i16> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v64i1_v64f32 = sitofp <64 x i1> undef to <64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64i1_v64f64 = sitofp <64 x i1> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v128i8_v128f32 = sitofp <128 x i8> undef to <128 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v128i8_v128f64 = sitofp <128 x i8> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128i16_v128f32 = sitofp <128 x i16> undef to <128 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i16_v128f64 = sitofp <128 x i16> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128i32_v128f32 = sitofp <128 x i32> undef to <128 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128i32_v128f64 = sitofp <128 x i32> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128i64_v128f32 = sitofp <128 x i64> undef to <128 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f64 = sitofp <128 x i16> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v128i1_v128f32 = sitofp <128 x i1> undef to <128 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128i1_v128f64 = sitofp <128 x i1> undef to <128 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i1_v8f32 = sitofp <8 x i1> undef to <8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i1_v8f64 = sitofp <8 x i1> undef to <8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i8_v16f32 = sitofp <16 x i8> undef to <16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i8_v16f64 = sitofp <16 x i8> undef to <16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i16_v16f32 = sitofp <16 x i16> undef to <16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i16_v16f64 = sitofp <16 x i16> undef to <16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i32_v16f32 = sitofp <16 x i32> undef to <16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i32_v16f64 = sitofp <16 x i32> undef to <16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i64_v16f32 = sitofp <16 x i64> undef to <16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i64_v16f64 = sitofp <16 x i16> undef to <16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i1_v16f32 = sitofp <16 x i1> undef to <16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16i1_v16f64 = sitofp <16 x i1> undef to <16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32i8_v32f32 = sitofp <32 x i8> undef to <32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i8_v32f64 = sitofp <32 x i8> undef to <32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i16_v32f32 = sitofp <32 x i16> undef to <32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i16_v32f64 = sitofp <32 x i16> undef to <32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i32_v32f32 = sitofp <32 x i32> undef to <32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32i32_v32f64 = sitofp <32 x i32> undef to <32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32i64_v32f32 = sitofp <32 x i64> undef to <32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i64_v32f64 = sitofp <32 x i16> undef to <32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v32i1_v32f32 = sitofp <32 x i1> undef to <32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i1_v32f64 = sitofp <32 x i1> undef to <32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64i8_v64f32 = sitofp <64 x i8> undef to <64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i8_v64f64 = sitofp <64 x i8> undef to <64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64i16_v64f32 = sitofp <64 x i16> undef to <64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i16_v64f64 = sitofp <64 x i16> undef to <64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i32_v64f32 = sitofp <64 x i32> undef to <64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64i32_v64f64 = sitofp <64 x i32> undef to <64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64i64_v64f32 = sitofp <64 x i64> undef to <64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i64_v64f64 = sitofp <64 x i16> undef to <64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v64i1_v64f32 = sitofp <64 x i1> undef to <64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64i1_v64f64 = sitofp <64 x i1> undef to <64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128i8_v128f32 = sitofp <128 x i8> undef to <128 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128i8_v128f64 = sitofp <128 x i8> undef to <128 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128i16_v128f32 = sitofp <128 x i16> undef to <128 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i16_v128f64 = sitofp <128 x i16> undef to <128 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v128i32_v128f32 = sitofp <128 x i32> undef to <128 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128i32_v128f64 = sitofp <128 x i32> undef to <128 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128i64_v128f32 = sitofp <128 x i64> undef to <128 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i64_v128f64 = sitofp <128 x i16> undef to <128 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v128i1_v128f32 = sitofp <128 x i1> undef to <128 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %v128i1_v128f64 = sitofp <128 x i1> undef to <128 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f32 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f64 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x double>
@@ -3344,94 +3344,94 @@ define void @sitofp() {
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f64 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f32 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f64 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i8_nxv2f64 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f32 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i16_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i16_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f32 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f64 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i32_nxv2f64 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f16 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_nxv2f32 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f32 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f64 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i1_nxv2f64 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i8_nxv4f32 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i8_nxv4f64 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i8_nxv4f32 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i8_nxv4f64 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f32 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f32 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i16_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f32 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f64 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i64_nxv4f32 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i32_nxv4f32 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i32_nxv4f64 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f32 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i64_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f32 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f64 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f32 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f64 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_nxv8f32 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f32 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f64 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i64_nxv8f32 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f32 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f64 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16i8_nxv16f32 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i8_nxv16f64 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_nxv16f32 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i16_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_nxv16f32 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i32_nxv16f64 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i64_nxv16f32 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i64_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i1_nxv16f32 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16i1_nxv16f64 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv32i8_nxv32f32 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i8_nxv32f64 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i16_nxv32f32 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i16_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i1_nxv4f32 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4i1_nxv4f64 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i8_nxv8f32 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i8_nxv8f64 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i16_nxv8f32 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i16_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i32_nxv8f32 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i32_nxv8f64 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i64_nxv8f32 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i64_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i1_nxv8f32 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8i1_nxv8f64 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16i8_nxv16f32 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i8_nxv16f64 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i16_nxv16f32 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i16_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i32_nxv16f32 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16i32_nxv16f64 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16i64_nxv16f32 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i64_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv16i1_nxv16f32 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i1_nxv16f64 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32i8_nxv32f32 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i8_nxv32f64 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32i16_nxv32f32 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i16_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32i32_nxv32f32 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32i32_nxv32f64 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32i64_nxv32f32 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i64_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv32i1_nxv32f32 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32i1_nxv32f64 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv64i8_nxv64f32 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %nxv64i8_nxv64f64 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32i32_nxv32f64 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32i64_nxv32f32 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i64_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv32i1_nxv32f32 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32i1_nxv32f64 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64i8_nxv64f32 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64i8_nxv64f64 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64i16_nxv64f32 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64i16_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64i16_nxv64f32 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i16_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64i32_nxv64f32 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64i32_nxv64f64 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64i64_nxv64f32 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64i64_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv64i1_nxv64f32 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64i1_nxv64f64 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64i32_nxv64f64 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64i64_nxv64f32 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i64_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv64i1_nxv64f32 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64i1_nxv64f64 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
%v2i8_v2f16 = sitofp <2 x i8> undef to <2 x half>
@@ -3680,94 +3680,94 @@ define void @uitofp() {
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f64 = uitofp <2 x i1> undef to <2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f32 = uitofp <4 x i8> undef to <4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f64 = uitofp <4 x i8> undef to <4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i8_v4f64 = uitofp <4 x i8> undef to <4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f32 = uitofp <4 x i16> undef to <4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16_v4f64 = uitofp <4 x i16> undef to <4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i16_v4f64 = uitofp <4 x i16> undef to <4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f32 = uitofp <4 x i32> undef to <4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f64 = uitofp <4 x i32> undef to <4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i32_v4f64 = uitofp <4 x i32> undef to <4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_v4f32 = uitofp <4 x i64> undef to <4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f64 = uitofp <4 x i16> undef to <4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f64 = uitofp <4 x i16> undef to <4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f32 = uitofp <4 x i1> undef to <4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f64 = uitofp <4 x i1> undef to <4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i1_v4f64 = uitofp <4 x i1> undef to <4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f32 = uitofp <8 x i8> undef to <8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f64 = uitofp <8 x i8> undef to <8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i8_v8f32 = uitofp <8 x i8> undef to <8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i8_v8f64 = uitofp <8 x i8> undef to <8 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f32 = uitofp <8 x i16> undef to <8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f64 = uitofp <8 x i16> undef to <8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f32 = uitofp <8 x i16> undef to <8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i16_v8f64 = uitofp <8 x i16> undef to <8 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f32 = uitofp <8 x i32> undef to <8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f64 = uitofp <8 x i32> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i64_v8f32 = uitofp <8 x i64> undef to <8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f64 = uitofp <8 x i16> undef to <8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i32_v8f32 = uitofp <8 x i32> undef to <8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i32_v8f64 = uitofp <8 x i32> undef to <8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f32 = uitofp <8 x i64> undef to <8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i64_v8f64 = uitofp <8 x i16> undef to <8 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f32 = uitofp <8 x i1> undef to <8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f64 = uitofp <8 x i1> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f32 = uitofp <16 x i8> undef to <16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f64 = uitofp <16 x i8> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f32 = uitofp <16 x i16> undef to <16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f64 = uitofp <16 x i16> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f32 = uitofp <16 x i32> undef to <16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f64 = uitofp <16 x i32> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i64_v16f32 = uitofp <16 x i64> undef to <16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f64 = uitofp <16 x i16> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f32 = uitofp <16 x i1> undef to <16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f64 = uitofp <16 x i1> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32i8_v32f32 = uitofp <32 x i8> undef to <32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i8_v32f64 = uitofp <32 x i8> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f32 = uitofp <32 x i16> undef to <32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i16_v32f64 = uitofp <32 x i16> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f32 = uitofp <32 x i32> undef to <32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i32_v32f64 = uitofp <32 x i32> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i64_v32f32 = uitofp <32 x i64> undef to <32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f64 = uitofp <32 x i16> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f32 = uitofp <32 x i1> undef to <32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32i1_v32f64 = uitofp <32 x i1> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v64i8_v64f32 = uitofp <64 x i8> undef to <64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i8_v64f64 = uitofp <64 x i8> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i16_v64f32 = uitofp <64 x i16> undef to <64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i16_v64f64 = uitofp <64 x i16> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64i32_v64f32 = uitofp <64 x i32> undef to <64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64i32_v64f64 = uitofp <64 x i32> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64i64_v64f32 = uitofp <64 x i64> undef to <64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f64 = uitofp <64 x i16> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v64i1_v64f32 = uitofp <64 x i1> undef to <64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64i1_v64f64 = uitofp <64 x i1> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v128i8_v128f32 = uitofp <128 x i8> undef to <128 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v128i8_v128f64 = uitofp <128 x i8> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128i16_v128f32 = uitofp <128 x i16> undef to <128 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i16_v128f64 = uitofp <128 x i16> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128i32_v128f32 = uitofp <128 x i32> undef to <128 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128i32_v128f64 = uitofp <128 x i32> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128i64_v128f32 = uitofp <128 x i64> undef to <128 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f64 = uitofp <128 x i16> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v128i1_v128f32 = uitofp <128 x i1> undef to <128 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128i1_v128f64 = uitofp <128 x i1> undef to <128 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i1_v8f32 = uitofp <8 x i1> undef to <8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i1_v8f64 = uitofp <8 x i1> undef to <8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i8_v16f32 = uitofp <16 x i8> undef to <16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i8_v16f64 = uitofp <16 x i8> undef to <16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i16_v16f32 = uitofp <16 x i16> undef to <16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i16_v16f64 = uitofp <16 x i16> undef to <16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i32_v16f32 = uitofp <16 x i32> undef to <16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i32_v16f64 = uitofp <16 x i32> undef to <16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i64_v16f32 = uitofp <16 x i64> undef to <16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i64_v16f64 = uitofp <16 x i16> undef to <16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i1_v16f32 = uitofp <16 x i1> undef to <16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16i1_v16f64 = uitofp <16 x i1> undef to <16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32i8_v32f32 = uitofp <32 x i8> undef to <32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i8_v32f64 = uitofp <32 x i8> undef to <32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i16_v32f32 = uitofp <32 x i16> undef to <32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i16_v32f64 = uitofp <32 x i16> undef to <32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i32_v32f32 = uitofp <32 x i32> undef to <32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32i32_v32f64 = uitofp <32 x i32> undef to <32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32i64_v32f32 = uitofp <32 x i64> undef to <32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i64_v32f64 = uitofp <32 x i16> undef to <32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v32i1_v32f32 = uitofp <32 x i1> undef to <32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i1_v32f64 = uitofp <32 x i1> undef to <32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64i8_v64f32 = uitofp <64 x i8> undef to <64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i8_v64f64 = uitofp <64 x i8> undef to <64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64i16_v64f32 = uitofp <64 x i16> undef to <64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i16_v64f64 = uitofp <64 x i16> undef to <64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i32_v64f32 = uitofp <64 x i32> undef to <64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64i32_v64f64 = uitofp <64 x i32> undef to <64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64i64_v64f32 = uitofp <64 x i64> undef to <64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i64_v64f64 = uitofp <64 x i16> undef to <64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v64i1_v64f32 = uitofp <64 x i1> undef to <64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64i1_v64f64 = uitofp <64 x i1> undef to <64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128i8_v128f32 = uitofp <128 x i8> undef to <128 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128i8_v128f64 = uitofp <128 x i8> undef to <128 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128i16_v128f32 = uitofp <128 x i16> undef to <128 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i16_v128f64 = uitofp <128 x i16> undef to <128 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v128i32_v128f32 = uitofp <128 x i32> undef to <128 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128i32_v128f64 = uitofp <128 x i32> undef to <128 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128i64_v128f32 = uitofp <128 x i64> undef to <128 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i64_v128f64 = uitofp <128 x i16> undef to <128 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v128i1_v128f32 = uitofp <128 x i1> undef to <128 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %v128i1_v128f64 = uitofp <128 x i1> undef to <128 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f32 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f64 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x double>
@@ -3785,94 +3785,94 @@ define void @uitofp() {
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f64 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f32 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f64 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i8_nxv2f64 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f32 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i16_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i16_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f32 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f64 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i32_nxv2f64 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f16 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_nxv2f32 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f32 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f64 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i1_nxv2f64 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i8_nxv4f32 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i8_nxv4f64 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i8_nxv4f32 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i8_nxv4f64 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f32 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f32 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i16_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f32 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f64 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i64_nxv4f32 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i32_nxv4f32 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i32_nxv4f64 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f32 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i64_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f32 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f64 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f32 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f64 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_nxv8f32 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f32 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f64 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i64_nxv8f32 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f32 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f64 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16i8_nxv16f32 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i8_nxv16f64 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_nxv16f32 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i16_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_nxv16f32 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i32_nxv16f64 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i64_nxv16f32 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i64_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i1_nxv16f32 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16i1_nxv16f64 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv32i8_nxv32f32 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i8_nxv32f64 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i16_nxv32f32 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i16_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i1_nxv4f32 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4i1_nxv4f64 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i8_nxv8f32 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i8_nxv8f64 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i16_nxv8f32 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i16_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i32_nxv8f32 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i32_nxv8f64 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i64_nxv8f32 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i64_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i1_nxv8f32 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8i1_nxv8f64 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16i8_nxv16f32 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i8_nxv16f64 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i16_nxv16f32 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i16_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i32_nxv16f32 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16i32_nxv16f64 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16i64_nxv16f32 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i64_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv16i1_nxv16f32 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i1_nxv16f64 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32i8_nxv32f32 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i8_nxv32f64 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32i16_nxv32f32 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i16_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32i32_nxv32f32 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32i32_nxv32f64 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32i64_nxv32f32 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i64_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv32i1_nxv32f32 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32i1_nxv32f64 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv64i8_nxv64f32 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %nxv64i8_nxv64f64 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32i32_nxv32f64 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32i64_nxv32f32 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i64_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv32i1_nxv32f32 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32i1_nxv32f64 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64i8_nxv64f32 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64i8_nxv64f64 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64i16_nxv64f32 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64i16_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64i16_nxv64f32 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i16_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64i32_nxv64f32 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64i32_nxv64f64 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv64i64_nxv64f32 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64i64_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
-; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv64i1_nxv64f32 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
-; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64i1_nxv64f64 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64i32_nxv64f64 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 37 for instruction: %nxv64i64_nxv64f32 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i64_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
+; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv64i1_nxv64f32 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
+; RV32-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64i1_nxv64f64 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; RV64-LABEL: 'uitofp'
@@ -3893,94 +3893,94 @@ define void @uitofp() {
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f64 = uitofp <2 x i1> undef to <2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f32 = uitofp <4 x i8> undef to <4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f64 = uitofp <4 x i8> undef to <4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i8_v4f64 = uitofp <4 x i8> undef to <4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f32 = uitofp <4 x i16> undef to <4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16_v4f64 = uitofp <4 x i16> undef to <4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i16_v4f64 = uitofp <4 x i16> undef to <4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f32 = uitofp <4 x i32> undef to <4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f64 = uitofp <4 x i32> undef to <4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i32_v4f64 = uitofp <4 x i32> undef to <4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_v4f32 = uitofp <4 x i64> undef to <4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f64 = uitofp <4 x i16> undef to <4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f64 = uitofp <4 x i16> undef to <4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f32 = uitofp <4 x i1> undef to <4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f64 = uitofp <4 x i1> undef to <4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i1_v4f64 = uitofp <4 x i1> undef to <4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f32 = uitofp <8 x i8> undef to <8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i8_v8f64 = uitofp <8 x i8> undef to <8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i8_v8f32 = uitofp <8 x i8> undef to <8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i8_v8f64 = uitofp <8 x i8> undef to <8 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f32 = uitofp <8 x i16> undef to <8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f64 = uitofp <8 x i16> undef to <8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f32 = uitofp <8 x i16> undef to <8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i16_v8f64 = uitofp <8 x i16> undef to <8 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f32 = uitofp <8 x i32> undef to <8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f64 = uitofp <8 x i32> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i64_v8f32 = uitofp <8 x i64> undef to <8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f64 = uitofp <8 x i16> undef to <8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i32_v8f32 = uitofp <8 x i32> undef to <8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i32_v8f64 = uitofp <8 x i32> undef to <8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f32 = uitofp <8 x i64> undef to <8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i64_v8f64 = uitofp <8 x i16> undef to <8 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f32 = uitofp <8 x i1> undef to <8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f64 = uitofp <8 x i1> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f32 = uitofp <16 x i8> undef to <16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f64 = uitofp <16 x i8> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_v16f32 = uitofp <16 x i16> undef to <16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f64 = uitofp <16 x i16> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f32 = uitofp <16 x i32> undef to <16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_v16f64 = uitofp <16 x i32> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i64_v16f32 = uitofp <16 x i64> undef to <16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i64_v16f64 = uitofp <16 x i16> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f32 = uitofp <16 x i1> undef to <16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i1_v16f64 = uitofp <16 x i1> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32i8_v32f32 = uitofp <32 x i8> undef to <32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i8_v32f64 = uitofp <32 x i8> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i16_v32f32 = uitofp <32 x i16> undef to <32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i16_v32f64 = uitofp <32 x i16> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i32_v32f32 = uitofp <32 x i32> undef to <32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i32_v32f64 = uitofp <32 x i32> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i64_v32f32 = uitofp <32 x i64> undef to <32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v32i64_v32f64 = uitofp <32 x i16> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v32i1_v32f32 = uitofp <32 x i1> undef to <32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v32i1_v32f64 = uitofp <32 x i1> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v64i8_v64f32 = uitofp <64 x i8> undef to <64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i8_v64f64 = uitofp <64 x i8> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i16_v64f32 = uitofp <64 x i16> undef to <64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i16_v64f64 = uitofp <64 x i16> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64i32_v64f32 = uitofp <64 x i32> undef to <64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64i32_v64f64 = uitofp <64 x i32> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64i64_v64f32 = uitofp <64 x i64> undef to <64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v64i64_v64f64 = uitofp <64 x i16> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v64i1_v64f32 = uitofp <64 x i1> undef to <64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v64i1_v64f64 = uitofp <64 x i1> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v128i8_v128f32 = uitofp <128 x i8> undef to <128 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %v128i8_v128f64 = uitofp <128 x i8> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128i16_v128f32 = uitofp <128 x i16> undef to <128 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i16_v128f64 = uitofp <128 x i16> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128i32_v128f32 = uitofp <128 x i32> undef to <128 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128i32_v128f64 = uitofp <128 x i32> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v128i64_v128f32 = uitofp <128 x i64> undef to <128 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %v128i64_v128f64 = uitofp <128 x i16> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v128i1_v128f32 = uitofp <128 x i1> undef to <128 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v128i1_v128f64 = uitofp <128 x i1> undef to <128 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i1_v8f32 = uitofp <8 x i1> undef to <8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i1_v8f64 = uitofp <8 x i1> undef to <8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i8_v16f32 = uitofp <16 x i8> undef to <16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i8_v16f64 = uitofp <16 x i8> undef to <16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i16_v16f32 = uitofp <16 x i16> undef to <16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i16_v16f64 = uitofp <16 x i16> undef to <16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i32_v16f32 = uitofp <16 x i32> undef to <16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i32_v16f64 = uitofp <16 x i32> undef to <16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i64_v16f32 = uitofp <16 x i64> undef to <16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i64_v16f64 = uitofp <16 x i16> undef to <16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i1_v16f32 = uitofp <16 x i1> undef to <16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16i1_v16f64 = uitofp <16 x i1> undef to <16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32i8_v32f32 = uitofp <32 x i8> undef to <32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i8_v32f64 = uitofp <32 x i8> undef to <32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i16_v32f32 = uitofp <32 x i16> undef to <32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i16_v32f64 = uitofp <32 x i16> undef to <32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i32_v32f32 = uitofp <32 x i32> undef to <32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32i32_v32f64 = uitofp <32 x i32> undef to <32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32i64_v32f32 = uitofp <32 x i64> undef to <32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i64_v32f64 = uitofp <32 x i16> undef to <32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v32i1_v32f32 = uitofp <32 x i1> undef to <32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i1_v32f64 = uitofp <32 x i1> undef to <32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64i8_v64f32 = uitofp <64 x i8> undef to <64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i8_v64f64 = uitofp <64 x i8> undef to <64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64i16_v64f32 = uitofp <64 x i16> undef to <64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i16_v64f64 = uitofp <64 x i16> undef to <64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i32_v64f32 = uitofp <64 x i32> undef to <64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64i32_v64f64 = uitofp <64 x i32> undef to <64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64i64_v64f32 = uitofp <64 x i64> undef to <64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i64_v64f64 = uitofp <64 x i16> undef to <64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v64i1_v64f32 = uitofp <64 x i1> undef to <64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64i1_v64f64 = uitofp <64 x i1> undef to <64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128i8_v128f32 = uitofp <128 x i8> undef to <128 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128i8_v128f64 = uitofp <128 x i8> undef to <128 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128i16_v128f32 = uitofp <128 x i16> undef to <128 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i16_v128f64 = uitofp <128 x i16> undef to <128 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v128i32_v128f32 = uitofp <128 x i32> undef to <128 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128i32_v128f64 = uitofp <128 x i32> undef to <128 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128i64_v128f32 = uitofp <128 x i64> undef to <128 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i64_v128f64 = uitofp <128 x i16> undef to <128 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v128i1_v128f32 = uitofp <128 x i1> undef to <128 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %v128i1_v128f64 = uitofp <128 x i1> undef to <128 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f32 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f64 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x double>
@@ -3998,94 +3998,94 @@ define void @uitofp() {
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f64 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f32 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f64 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i8_nxv2f64 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f32 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i16_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i16_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f32 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f64 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i32_nxv2f64 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f16 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_nxv2f32 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f32 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f64 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i1_nxv2f64 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i8_nxv4f32 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i8_nxv4f64 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i8_nxv4f32 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i8_nxv4f64 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f32 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f32 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i16_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f32 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f64 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i64_nxv4f32 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i32_nxv4f32 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i32_nxv4f64 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f32 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i64_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f32 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f64 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f32 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f64 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_nxv8f32 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f32 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_nxv8f64 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i64_nxv8f32 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f32 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8i1_nxv8f64 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16i8_nxv16f32 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i8_nxv16f64 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_nxv16f32 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i16_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_nxv16f32 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i32_nxv16f64 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i64_nxv16f32 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv16i64_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv16i1_nxv16f32 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv16i1_nxv16f64 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv32i8_nxv32f32 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i8_nxv32f64 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i16_nxv32f32 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i16_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i1_nxv4f32 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4i1_nxv4f64 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i8_nxv8f32 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i8_nxv8f64 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i16_nxv8f32 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i16_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i32_nxv8f32 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i32_nxv8f64 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i64_nxv8f32 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i64_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i1_nxv8f32 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8i1_nxv8f64 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16i8_nxv16f32 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i8_nxv16f64 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i16_nxv16f32 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i16_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i32_nxv16f32 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16i32_nxv16f64 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16i64_nxv16f32 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i64_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv16i1_nxv16f32 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i1_nxv16f64 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32i8_nxv32f32 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i8_nxv32f64 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32i16_nxv32f32 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i16_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32i32_nxv32f32 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32i32_nxv32f64 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv32i64_nxv32f32 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv32i64_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv32i1_nxv32f32 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv32i1_nxv32f64 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %nxv64i8_nxv64f32 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %nxv64i8_nxv64f64 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32i32_nxv32f64 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32i64_nxv32f32 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i64_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv32i1_nxv32f32 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32i1_nxv32f64 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64i8_nxv64f32 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64i8_nxv64f64 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64i16_nxv64f32 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64i16_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64i16_nxv64f32 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i16_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64i32_nxv64f32 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64i32_nxv64f64 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv64i64_nxv64f32 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %nxv64i64_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
-; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv64i1_nxv64f32 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
-; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv64i1_nxv64f64 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64i32_nxv64f64 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64i64_nxv64f32 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i64_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
+; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv64i1_nxv64f32 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
+; RV64-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64i1_nxv64f64 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
%v2i8_v2f16 = uitofp <2 x i8> undef to <2 x half>
>From 450f400241c5d534a7fa47dbdece7d9d86383a7a Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Thu, 4 Apr 2024 18:12:52 -0700
Subject: [PATCH 2/2] Address comments
1. Re-implement fp conversion for VFHMIN cases
2. Separate vfhmin cases from cast.ll
---
.../Target/RISCV/RISCVTargetTransformInfo.cpp | 125 +-
.../Analysis/CostModel/RISCV/cast-vfhmin.ll | 1469 +++++++++++++++++
llvm/test/Analysis/CostModel/RISCV/cast.ll | 984 +----------
3 files changed, 1599 insertions(+), 979 deletions(-)
create mode 100644 llvm/test/Analysis/CostModel/RISCV/cast-vfhmin.ll
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 6ea17aa1130963..03d5b9abd0934a 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -997,42 +997,42 @@ InstructionCost RISCVTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
IsSigned ? RISCV::VFNCVT_RTZ_X_F_W : RISCV::VFNCVT_RTZ_XU_F_W;
unsigned SrcEltSize = Src->getScalarSizeInBits();
unsigned DstEltSize = Dst->getScalarSizeInBits();
- if (DstEltSize == 1) {
- // For fp vector to mask, we use:
- // vfncvt.rtz.x.f.w v9, v8
- // vand.vi v8, v9, 1
- // vmsne.vi v0, v8, 0
- SrcEltSize /= 2;
- MVT ElementVT = MVT::getIntegerVT(SrcEltSize);
- MVT InterimVT = SrcLT.second.changeVectorElementType(ElementVT);
- return getRISCVInstructionCost(FNCVT, InterimVT, CostKind) +
- getRISCVInstructionCost({RISCV::VAND_VI, RISCV::VMSNE_VI},
- DstLT.second, CostKind);
+ if ((SrcEltSize == 16) &&
+ (!ST->hasVInstructionsF16() || ((DstEltSize >> 1) > SrcEltSize))) {
+ // pre-widening to f32 and then convert f32 to integer
+ VectorType *VecF32Ty =
+ VectorType::get(Type::getDoubleTy(Dst->getContext()),
+ cast<VectorType>(Dst)->getElementCount());
+ std::pair<InstructionCost, MVT> VecF32LT =
+ getTypeLegalizationCost(VecF32Ty);
+ InstructionCost WidenCost = getRISCVInstructionCost(
+ RISCV::VFWCVT_F_F_V, VecF32LT.second, CostKind);
+ InstructionCost ConvCost =
+ getCastInstrCost(Opcode, Dst, VecF32Ty, CCH, CostKind, I);
+ return VecF32LT.first * WidenCost + ConvCost;
}
if (DstEltSize == SrcEltSize)
return getRISCVInstructionCost(FCVT, DstLT.second, CostKind);
- if (DstEltSize == (2 * SrcEltSize))
+ if ((DstEltSize >> 1) == SrcEltSize)
return getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
- if (DstEltSize == (4 * SrcEltSize) && (SrcEltSize == 16)) {
- // Convert f16 to f32 then convert f32 to i64.
- MVT VecF32VT = DstLT.second.changeVectorElementType(MVT::f32);
- return getRISCVInstructionCost(RISCV::VFWCVT_F_F_V, VecF32VT, CostKind) +
- getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
+ InstructionCost TruncCost = 0;
+ if ((SrcEltSize >> 1) > DstEltSize) {
+ VectorType *VecTy =
+ VectorType::get(IntegerType::get(Dst->getContext(), SrcEltSize >> 1),
+ cast<VectorType>(Dst)->getElementCount());
+ TruncCost =
+ getCastInstrCost(Instruction::Trunc, Dst, VecTy, CCH, CostKind, I);
}
- if (DstEltSize < SrcEltSize) {
- SrcEltSize /= 2;
- MVT ElementVT = MVT::getIntegerVT(SrcEltSize);
- MVT InterimVT = DstLT.second.changeVectorElementType(ElementVT);
- InstructionCost Cost =
- getRISCVInstructionCost(FNCVT, InterimVT, CostKind);
- while (DstEltSize < SrcEltSize) {
- SrcEltSize /= 2;
- ElementVT = MVT::getIntegerVT(SrcEltSize);
- InterimVT = DstLT.second.changeVectorElementType(ElementVT);
- Cost += getRISCVInstructionCost(RISCV::VNSRL_WI, InterimVT, CostKind);
- }
- return Cost;
+ if (SrcEltSize > DstEltSize) {
+ // First do a narrowing conversion to an integer half the size, then
+ // truncate if needed.
+ MVT ElementVT = MVT::getIntegerVT(SrcEltSize >> 1);
+ MVT VecVT = DstLT.second.changeVectorElementType(ElementVT);
+ InstructionCost ConvCost =
+ getRISCVInstructionCost(FNCVT, VecVT, CostKind);
+ return ConvCost + TruncCost;
}
+
return BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
}
case ISD::SINT_TO_FP:
@@ -1044,48 +1044,39 @@ InstructionCost RISCVTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
unsigned SrcEltSize = Src->getScalarSizeInBits();
unsigned DstEltSize = Dst->getScalarSizeInBits();
- if (SrcEltSize == 1) {
- // For mask vector to fp, we use:
- // vmv.v.i v8, 0
- // vmerge.vim v8, v8, -1, v0
- // vfwcvt.f.x.v v8, v8
- MVT ElementVT = MVT::getIntegerVT(DstEltSize >> 1);
- MVT VecHalfVT = DstLT.second.changeVectorElementType(ElementVT);
- return getRISCVInstructionCost({RISCV::VMV_V_I, RISCV::VMERGE_VIM},
- VecHalfVT, CostKind) +
- getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
+ if ((DstEltSize == 16) &&
+ (!ST->hasVInstructionsF16() || ((SrcEltSize >> 1) > DstEltSize))) {
+ // convert to f32 and then f32 to f16
+ VectorType *VecF32Ty =
+ VectorType::get(Type::getDoubleTy(Dst->getContext()),
+ cast<VectorType>(Dst)->getElementCount());
+ std::pair<InstructionCost, MVT> VecF32LT =
+ getTypeLegalizationCost(VecF32Ty);
+ InstructionCost FP32ConvCost =
+ getCastInstrCost(Opcode, VecF32Ty, Src, CCH, CostKind, I);
+ return FP32ConvCost +
+ VecF32LT.first * getRISCVInstructionCost(RISCV::VFNCVT_F_F_W,
+ DstLT.second, CostKind);
}
- if (DstEltSize == SrcEltSize)
- return getRISCVInstructionCost(FCVT, DstLT.second, CostKind);
-
- if (DstEltSize == (2 * SrcEltSize))
- return getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
-
- if (DstEltSize == (4 * SrcEltSize)) {
- unsigned WidenIntOp = IsSigned ? RISCV::VSEXT_VF2 : RISCV::VZEXT_VF2;
- MVT ElementVT = MVT::getIntegerVT(DstEltSize >> 1);
- MVT VecVT = DstLT.second.changeVectorElementType(ElementVT);
- return getRISCVInstructionCost(WidenIntOp, VecVT, CostKind) +
- getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
+ InstructionCost PreWidenCost = 0;
+ if ((DstEltSize >> 1) > SrcEltSize) {
+ // Do pre-widening before converting
+ SrcEltSize = DstEltSize >> 1;
+ VectorType *VecTy =
+ VectorType::get(IntegerType::get(Dst->getContext(), SrcEltSize),
+ cast<VectorType>(Dst)->getElementCount());
+ unsigned Op = IsSigned ? Instruction::SExt : Instruction::ZExt;
+ PreWidenCost = getCastInstrCost(Op, VecTy, Src, CCH, CostKind, I);
}
- if (DstEltSize == (8 * SrcEltSize)) {
- unsigned WidenIntOp = IsSigned ? RISCV::VSEXT_VF4 : RISCV::VZEXT_VF4;
- MVT ElementVT = MVT::getIntegerVT(DstEltSize >> 1);
- MVT VecVT = DstLT.second.changeVectorElementType(ElementVT);
- return getRISCVInstructionCost(WidenIntOp, VecVT, CostKind) +
+ if (DstEltSize == SrcEltSize)
+ return PreWidenCost +
+ getRISCVInstructionCost(FCVT, DstLT.second, CostKind);
+ if ((DstEltSize >> 1) == SrcEltSize)
+ return PreWidenCost +
getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
- }
- if (SrcEltSize == (2 * DstEltSize))
+ if ((SrcEltSize >> 1) == DstEltSize)
return getRISCVInstructionCost(FNCVT, DstLT.second, CostKind);
-
- if ((SrcEltSize == (4 * DstEltSize)) && (DstEltSize == 16)) {
- // Handle i64 to f16: vfncvt.f.x/xu + vfncvt.f.f
- MVT DstVT = DstLT.second.changeVectorElementType(MVT::f32);
- return getRISCVInstructionCost(FNCVT, DstVT, CostKind) +
- getRISCVInstructionCost(RISCV::VFNCVT_F_F_W, DstLT.second,
- CostKind);
- }
return BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
}
}
diff --git a/llvm/test/Analysis/CostModel/RISCV/cast-vfhmin.ll b/llvm/test/Analysis/CostModel/RISCV/cast-vfhmin.ll
new file mode 100644
index 00000000000000..ce835743df48d3
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/RISCV/cast-vfhmin.ll
@@ -0,0 +1,1469 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt < %s -mtriple=riscv32 -mattr=+v,+zfh,+zvfh -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s -check-prefixes=RV32ZVFH
+; RUN: opt < %s -mtriple=riscv32 -mattr=+v,+zfh,+zvfhmin -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s -check-prefixes=RV32ZVFHMIN
+; RUN: opt < %s -mtriple=riscv64 -mattr=+v,+zfh,+zvfh -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s -check-prefixes=RV64ZVFH
+; RUN: opt < %s -mtriple=riscv64 -mattr=+v,+zfh,+zvfhmin -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s -check-prefixes=RV64ZVFHMIN
+
+define void @fptosi() {
+; RV32ZVFH-LABEL: 'fptosi'
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i8 = fptosi <2 x half> undef to <2 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i16 = fptosi <2 x half> undef to <2 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i32 = fptosi <2 x half> undef to <2 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptosi <2 x half> undef to <2 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i1 = fptosi <2 x half> undef to <2 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i8 = fptosi <4 x half> undef to <4 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i16 = fptosi <4 x half> undef to <4 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i16 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i32 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i1 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i8 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i16 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV32ZVFHMIN-LABEL: 'fptosi'
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16_v2i8 = fptosi <2 x half> undef to <2 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i16 = fptosi <2 x half> undef to <2 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i32 = fptosi <2 x half> undef to <2 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptosi <2 x half> undef to <2 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16_v2i1 = fptosi <2 x half> undef to <2 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4f16_v4i8 = fptosi <4 x half> undef to <4 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i16 = fptosi <4 x half> undef to <4 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 59 for instruction: %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 127 for instruction: %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1f16_nxv1i8 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i16 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i32 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1f16_nxv1i1 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2f16_nxv2i8 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i16 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2f16_nxv2i1 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i8 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4f16_nxv4i16 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv4f16_nxv4i1 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv8f16_nxv8i8 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %nxv8f16_nxv8i1 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 59 for instruction: %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 127 for instruction: %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV64ZVFH-LABEL: 'fptosi'
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i8 = fptosi <2 x half> undef to <2 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i16 = fptosi <2 x half> undef to <2 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i32 = fptosi <2 x half> undef to <2 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptosi <2 x half> undef to <2 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i1 = fptosi <2 x half> undef to <2 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i8 = fptosi <4 x half> undef to <4 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i16 = fptosi <4 x half> undef to <4 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i16 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i32 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i1 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i8 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i16 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV64ZVFHMIN-LABEL: 'fptosi'
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16_v2i8 = fptosi <2 x half> undef to <2 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i16 = fptosi <2 x half> undef to <2 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i32 = fptosi <2 x half> undef to <2 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptosi <2 x half> undef to <2 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16_v2i1 = fptosi <2 x half> undef to <2 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4f16_v4i8 = fptosi <4 x half> undef to <4 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i16 = fptosi <4 x half> undef to <4 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 59 for instruction: %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 127 for instruction: %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1f16_nxv1i8 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i16 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i32 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1f16_nxv1i1 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2f16_nxv2i8 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i16 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2f16_nxv2i1 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i8 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4f16_nxv4i16 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv4f16_nxv4i1 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv8f16_nxv8i8 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %nxv8f16_nxv8i1 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 59 for instruction: %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 127 for instruction: %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+ %v2f16_v2i8 = fptosi <2 x half> undef to <2 x i8>
+ %v2f16_v2i16 = fptosi <2 x half> undef to <2 x i16>
+ %v2f16_v2i32 = fptosi <2 x half> undef to <2 x i32>
+ %v2f16_v2i64 = fptosi <2 x half> undef to <2 x i64>
+ %v2f16_v2i1 = fptosi <2 x half> undef to <2 x i1>
+ %v4f16_v4i8 = fptosi <4 x half> undef to <4 x i8>
+ %v4f16_v4i16 = fptosi <4 x half> undef to <4 x i16>
+ %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
+ %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
+ %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
+ %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
+ %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
+ %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
+ %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
+ %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
+ %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
+ %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
+ %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
+ %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
+ %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
+ %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
+ %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
+ %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
+ %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
+ %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
+ %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
+ %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
+ %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
+ %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
+ %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
+ %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
+ %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
+ %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
+ %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
+ %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
+ %nxv1f16_nxv1i8 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i8>
+ %nxv1f16_nxv1i16 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i16>
+ %nxv1f16_nxv1i32 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i32>
+ %nxv1f16_nxv1i64 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i64>
+ %nxv1f16_nxv1i1 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i1>
+ %nxv2f16_nxv2i8 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i8>
+ %nxv2f16_nxv2i16 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i16>
+ %nxv2f16_nxv2i32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
+ %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
+ %nxv2f16_nxv2i1 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i1>
+ %nxv4f16_nxv4i8 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
+ %nxv4f16_nxv4i16 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i16>
+ %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
+ %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
+ %nxv4f16_nxv4i1 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i1>
+ %nxv8f16_nxv8i8 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
+ %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
+ %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
+ %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
+ %nxv8f16_nxv8i1 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i1>
+ %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
+ %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
+ %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
+ %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
+ %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
+ %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
+ %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
+ %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
+ %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
+ %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
+ %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
+ %nxv64f16_nxv64i16 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i16>
+ %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
+ %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
+ %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
+ ret void
+}
+
+define void @fptoui() {
+; RV32ZVFH-LABEL: 'fptoui'
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i8 = fptoui <2 x half> undef to <2 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i16 = fptoui <2 x half> undef to <2 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i32 = fptoui <2 x half> undef to <2 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptoui <2 x half> undef to <2 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i1 = fptoui <2 x half> undef to <2 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i8 = fptoui <4 x half> undef to <4 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i16 = fptoui <4 x half> undef to <4 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i16 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i32 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i1 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i8 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i16 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i16>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV32ZVFHMIN-LABEL: 'fptoui'
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16_v2i8 = fptoui <2 x half> undef to <2 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i16 = fptoui <2 x half> undef to <2 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i32 = fptoui <2 x half> undef to <2 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptoui <2 x half> undef to <2 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16_v2i1 = fptoui <2 x half> undef to <2 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4f16_v4i8 = fptoui <4 x half> undef to <4 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i16 = fptoui <4 x half> undef to <4 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 59 for instruction: %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 127 for instruction: %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1f16_nxv1i8 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i16 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i32 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1f16_nxv1i1 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2f16_nxv2i8 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i16 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2f16_nxv2i1 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i8 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4f16_nxv4i16 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv4f16_nxv4i1 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv8f16_nxv8i8 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %nxv8f16_nxv8i1 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 59 for instruction: %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 127 for instruction: %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i16>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV64ZVFH-LABEL: 'fptoui'
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i8 = fptoui <2 x half> undef to <2 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i16 = fptoui <2 x half> undef to <2 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i32 = fptoui <2 x half> undef to <2 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptoui <2 x half> undef to <2 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i1 = fptoui <2 x half> undef to <2 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i8 = fptoui <4 x half> undef to <4 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i16 = fptoui <4 x half> undef to <4 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i16 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i32 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i1 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i8 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i16 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i16>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV64ZVFHMIN-LABEL: 'fptoui'
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16_v2i8 = fptoui <2 x half> undef to <2 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i16 = fptoui <2 x half> undef to <2 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i32 = fptoui <2 x half> undef to <2 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptoui <2 x half> undef to <2 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f16_v2i1 = fptoui <2 x half> undef to <2 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4f16_v4i8 = fptoui <4 x half> undef to <4 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i16 = fptoui <4 x half> undef to <4 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 59 for instruction: %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 127 for instruction: %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1f16_nxv1i8 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i16 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i32 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1f16_nxv1i1 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2f16_nxv2i8 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i16 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2f16_nxv2i1 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i8 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4f16_nxv4i16 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv4f16_nxv4i1 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv8f16_nxv8i8 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %nxv8f16_nxv8i1 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 59 for instruction: %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 127 for instruction: %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i16>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+ %v2f16_v2i8 = fptoui <2 x half> undef to <2 x i8>
+ %v2f16_v2i16 = fptoui <2 x half> undef to <2 x i16>
+ %v2f16_v2i32 = fptoui <2 x half> undef to <2 x i32>
+ %v2f16_v2i64 = fptoui <2 x half> undef to <2 x i64>
+ %v2f16_v2i1 = fptoui <2 x half> undef to <2 x i1>
+ %v4f16_v4i8 = fptoui <4 x half> undef to <4 x i8>
+ %v4f16_v4i16 = fptoui <4 x half> undef to <4 x i16>
+ %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
+ %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
+ %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
+ %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
+ %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
+ %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
+ %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
+ %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
+ %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
+ %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
+ %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
+ %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
+ %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
+ %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
+ %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
+ %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
+ %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
+ %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
+ %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
+ %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
+ %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
+ %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
+ %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
+ %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
+ %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
+ %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
+ %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
+ %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
+ %nxv1f16_nxv1i8 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i8>
+ %nxv1f16_nxv1i16 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i16>
+ %nxv1f16_nxv1i32 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i32>
+ %nxv1f16_nxv1i64 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i64>
+ %nxv1f16_nxv1i1 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i1>
+ %nxv2f16_nxv2i8 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i8>
+ %nxv2f16_nxv2i16 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i16>
+ %nxv2f16_nxv2i32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
+ %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
+ %nxv2f16_nxv2i1 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i1>
+ %nxv4f16_nxv4i8 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
+ %nxv4f16_nxv4i16 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i16>
+ %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
+ %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
+ %nxv4f16_nxv4i1 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i1>
+ %nxv8f16_nxv8i8 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
+ %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
+ %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
+ %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
+ %nxv8f16_nxv8i1 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i1>
+ %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
+ %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
+ %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
+ %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
+ %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
+ %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
+ %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
+ %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
+ %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
+ %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
+ %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
+ %nxv64f16_nxv64i16 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i16>
+ %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
+ %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
+ %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
+ ret void
+}
+
+define void @sitofp() {
+; RV32ZVFH-LABEL: 'sitofp'
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2f16 = sitofp <2 x i8> undef to <2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f16 = sitofp <2 x i16> undef to <2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f16 = sitofp <2 x i32> undef to <2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = sitofp <2 x i64> undef to <2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f16 = sitofp <2 x i1> undef to <2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f16 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f16 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = sitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f16 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f16 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 87 for instruction: %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV32ZVFHMIN-LABEL: 'sitofp'
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i8_v2f16 = sitofp <2 x i8> undef to <2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i16_v2f16 = sitofp <2 x i16> undef to <2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i32_v2f16 = sitofp <2 x i32> undef to <2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = sitofp <2 x i64> undef to <2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2i1_v2f16 = sitofp <2 x i1> undef to <2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 99 for instruction: %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 199 for instruction: %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i8_nxv1f16 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i16_nxv1f16 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i32_nxv1f16 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = sitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1i1_nxv1f16 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i8_nxv2f16 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i16_nxv2f16 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i32_nxv2f16 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f16 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2i1_nxv2f16 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4i8_nxv4f16 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4i16_nxv4f16 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i32_nxv4f16 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv4i1_nxv4f16 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 99 for instruction: %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 87 for instruction: %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 199 for instruction: %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV64ZVFH-LABEL: 'sitofp'
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2f16 = sitofp <2 x i8> undef to <2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f16 = sitofp <2 x i16> undef to <2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f16 = sitofp <2 x i32> undef to <2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = sitofp <2 x i64> undef to <2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f16 = sitofp <2 x i1> undef to <2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f16 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f16 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = sitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f16 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f16 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV64ZVFHMIN-LABEL: 'sitofp'
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i8_v2f16 = sitofp <2 x i8> undef to <2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i16_v2f16 = sitofp <2 x i16> undef to <2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i32_v2f16 = sitofp <2 x i32> undef to <2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = sitofp <2 x i64> undef to <2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2i1_v2f16 = sitofp <2 x i1> undef to <2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 99 for instruction: %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 199 for instruction: %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i8_nxv1f16 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i16_nxv1f16 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i32_nxv1f16 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = sitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1i1_nxv1f16 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i8_nxv2f16 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i16_nxv2f16 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i32_nxv2f16 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f16 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2i1_nxv2f16 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4i8_nxv4f16 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4i16_nxv4f16 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i32_nxv4f16 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv4i1_nxv4f16 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 99 for instruction: %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 199 for instruction: %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+ %v2i8_v2f16 = sitofp <2 x i8> undef to <2 x half>
+ %v2i16_v2f16 = sitofp <2 x i16> undef to <2 x half>
+ %v2i32_v2f16 = sitofp <2 x i32> undef to <2 x half>
+ %v2i64_v2f16 = sitofp <2 x i64> undef to <2 x half>
+ %v2i1_v2f16 = sitofp <2 x i1> undef to <2 x half>
+ %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
+ %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
+ %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
+ %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
+ %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
+ %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
+ %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
+ %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
+ %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
+ %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
+ %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
+ %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
+ %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
+ %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
+ %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
+ %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
+ %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
+ %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
+ %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
+ %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
+ %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
+ %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
+ %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
+ %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
+ %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
+ %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
+ %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
+ %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
+ %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
+ %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
+ %nxv1i8_nxv1f16 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
+ %nxv1i16_nxv1f16 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
+ %nxv1i32_nxv1f16 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
+ %nxv1i64_nxv1f16 = sitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
+ %nxv1i1_nxv1f16 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
+ %nxv2i8_nxv2f16 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
+ %nxv2i16_nxv2f16 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
+ %nxv2i32_nxv2f16 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
+ %nxv2i64_nxv2f16 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
+ %nxv2i1_nxv2f16 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
+ %nxv4i8_nxv4f16 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
+ %nxv4i16_nxv4f16 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
+ %nxv4i32_nxv4f16 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
+ %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+ %nxv4i1_nxv4f16 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
+ %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+ %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+ %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+ %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+ %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+ %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+ %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+ %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+ %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+ %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+ %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+ %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+ %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+ %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+ %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+ %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+ %nxv64i16_nxv64f16 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
+ %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+ %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+ %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+ ret void
+}
+
+define void @uitofp() {
+; RV32ZVFH-LABEL: 'uitofp'
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2f16 = uitofp <2 x i8> undef to <2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f16 = uitofp <2 x i16> undef to <2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f16 = uitofp <2 x i32> undef to <2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = uitofp <2 x i64> undef to <2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f16 = uitofp <2 x i1> undef to <2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f16 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f16 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = uitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f16 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f16 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 87 for instruction: %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV32ZVFH-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV32ZVFHMIN-LABEL: 'uitofp'
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i8_v2f16 = uitofp <2 x i8> undef to <2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i16_v2f16 = uitofp <2 x i16> undef to <2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i32_v2f16 = uitofp <2 x i32> undef to <2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = uitofp <2 x i64> undef to <2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2i1_v2f16 = uitofp <2 x i1> undef to <2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 99 for instruction: %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 199 for instruction: %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i8_nxv1f16 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i16_nxv1f16 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i32_nxv1f16 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = uitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1i1_nxv1f16 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i8_nxv2f16 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i16_nxv2f16 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i32_nxv2f16 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f16 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2i1_nxv2f16 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4i8_nxv4f16 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4i16_nxv4f16 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i32_nxv4f16 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv4i1_nxv4f16 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 99 for instruction: %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 87 for instruction: %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 199 for instruction: %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV32ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV64ZVFH-LABEL: 'uitofp'
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2f16 = uitofp <2 x i8> undef to <2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f16 = uitofp <2 x i16> undef to <2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f16 = uitofp <2 x i32> undef to <2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = uitofp <2 x i64> undef to <2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f16 = uitofp <2 x i1> undef to <2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f16 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f16 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = uitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f16 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f16 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV64ZVFH-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; RV64ZVFHMIN-LABEL: 'uitofp'
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i8_v2f16 = uitofp <2 x i8> undef to <2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i16_v2f16 = uitofp <2 x i16> undef to <2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i32_v2f16 = uitofp <2 x i32> undef to <2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = uitofp <2 x i64> undef to <2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2i1_v2f16 = uitofp <2 x i1> undef to <2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 99 for instruction: %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 199 for instruction: %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i8_nxv1f16 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i16_nxv1f16 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i32_nxv1f16 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = uitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv1i1_nxv1f16 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i8_nxv2f16 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i16_nxv2f16 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i32_nxv2f16 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f16 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv2i1_nxv2f16 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4i8_nxv4f16 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv4i16_nxv4f16 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i32_nxv4f16 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv4i1_nxv4f16 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 83 for instruction: %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 99 for instruction: %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 199 for instruction: %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+; RV64ZVFHMIN-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+ %v2i8_v2f16 = uitofp <2 x i8> undef to <2 x half>
+ %v2i16_v2f16 = uitofp <2 x i16> undef to <2 x half>
+ %v2i32_v2f16 = uitofp <2 x i32> undef to <2 x half>
+ %v2i64_v2f16 = uitofp <2 x i64> undef to <2 x half>
+ %v2i1_v2f16 = uitofp <2 x i1> undef to <2 x half>
+ %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
+ %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
+ %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
+ %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
+ %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
+ %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
+ %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
+ %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
+ %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
+ %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
+ %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
+ %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
+ %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
+ %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
+ %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
+ %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
+ %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
+ %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
+ %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
+ %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
+ %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
+ %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
+ %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
+ %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
+ %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
+ %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
+ %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
+ %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
+ %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
+ %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
+ %nxv1i8_nxv1f16 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
+ %nxv1i16_nxv1f16 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
+ %nxv1i32_nxv1f16 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
+ %nxv1i64_nxv1f16 = uitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
+ %nxv1i1_nxv1f16 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
+ %nxv2i8_nxv2f16 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
+ %nxv2i16_nxv2f16 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
+ %nxv2i32_nxv2f16 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
+ %nxv2i64_nxv2f16 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
+ %nxv2i1_nxv2f16 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
+ %nxv4i8_nxv4f16 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
+ %nxv4i16_nxv4f16 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
+ %nxv4i32_nxv4f16 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
+ %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
+ %nxv4i1_nxv4f16 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
+ %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
+ %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
+ %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
+ %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
+ %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
+ %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
+ %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
+ %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
+ %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
+ %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
+ %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
+ %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
+ %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
+ %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
+ %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
+ %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
+ %nxv64i16_nxv64f16 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
+ %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
+ %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
+ %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
+ ret void
+}
diff --git a/llvm/test/Analysis/CostModel/RISCV/cast.ll b/llvm/test/Analysis/CostModel/RISCV/cast.ll
index 616310b30d0da9..b8cd1c73394e56 100644
--- a/llvm/test/Analysis/CostModel/RISCV/cast.ll
+++ b/llvm/test/Analysis/CostModel/RISCV/cast.ll
@@ -1701,652 +1701,442 @@ define void @fptrunc() {
define void @fptosi() {
; RV32-LABEL: 'fptosi'
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i8 = fptosi <2 x half> undef to <2 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f32_v2i8 = fptosi <2 x float> undef to <2 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i8 = fptosi <2 x double> undef to <2 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i16 = fptosi <2 x half> undef to <2 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i16 = fptosi <2 x float> undef to <2 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f64_v2i16 = fptosi <2 x double> undef to <2 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i32 = fptosi <2 x half> undef to <2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i32 = fptosi <2 x float> undef to <2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i32 = fptosi <2 x double> undef to <2 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptosi <2 x half> undef to <2 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i64 = fptosi <2 x float> undef to <2 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i64 = fptosi <2 x double> undef to <2 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i1 = fptosi <2 x half> undef to <2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f32_v2i1 = fptosi <2 x float> undef to <2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i1 = fptosi <2 x double> undef to <2 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i8 = fptosi <4 x half> undef to <4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i8 = fptosi <4 x float> undef to <4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i8 = fptosi <4 x double> undef to <4 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i16 = fptosi <4 x half> undef to <4 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i16 = fptosi <4 x float> undef to <4 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i16 = fptosi <4 x double> undef to <4 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i32 = fptosi <4 x float> undef to <4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i32 = fptosi <4 x double> undef to <4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i64 = fptosi <4 x float> undef to <4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i64 = fptosi <4 x double> undef to <4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f32_v4i1 = fptosi <4 x float> undef to <4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i1 = fptosi <4 x double> undef to <4 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i8 = fptosi <8 x float> undef to <8 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i8 = fptosi <8 x double> undef to <8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i16 = fptosi <8 x float> undef to <8 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i16 = fptosi <8 x double> undef to <8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i32 = fptosi <8 x float> undef to <8 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i32 = fptosi <8 x double> undef to <8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f32_v8i64 = fptosi <8 x float> undef to <8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i64 = fptosi <8 x double> undef to <8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f32_v8i1 = fptosi <8 x float> undef to <8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i1 = fptosi <8 x double> undef to <8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f64_v8i1 = fptosi <8 x double> undef to <8 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i8 = fptosi <16 x float> undef to <16 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v16f64_v16i8 = fptosi <16 x double> undef to <16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i16 = fptosi <16 x float> undef to <16 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i16 = fptosi <16 x double> undef to <16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i32 = fptosi <16 x float> undef to <16 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f64_v16i32 = fptosi <16 x double> undef to <16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f32_v16i64 = fptosi <16 x float> undef to <16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f64_v16i64 = fptosi <16 x double> undef to <16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i1 = fptosi <16 x float> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i1 = fptosi <16 x double> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f32_v16i1 = fptosi <16 x float> undef to <16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f64_v16i1 = fptosi <16 x double> undef to <16 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i8 = fptosi <32 x float> undef to <32 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v32f64_v32i8 = fptosi <32 x double> undef to <32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f32_v32i16 = fptosi <32 x float> undef to <32 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i16 = fptosi <32 x double> undef to <32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f32_v32i32 = fptosi <32 x float> undef to <32 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32f64_v32i32 = fptosi <32 x double> undef to <32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32f32_v32i64 = fptosi <32 x float> undef to <32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f64_v32i64 = fptosi <32 x double> undef to <32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i1 = fptosi <32 x float> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i1 = fptosi <32 x double> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32f32_v32i1 = fptosi <32 x float> undef to <32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f64_v32i1 = fptosi <32 x double> undef to <32 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i8 = fptosi <64 x float> undef to <64 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v64f64_v64i8 = fptosi <64 x double> undef to <64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64f32_v64i16 = fptosi <64 x float> undef to <64 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i16 = fptosi <64 x double> undef to <64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64f32_v64i32 = fptosi <64 x float> undef to <64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64f64_v64i32 = fptosi <64 x double> undef to <64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64f32_v64i64 = fptosi <64 x float> undef to <64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f64_v64i64 = fptosi <64 x double> undef to <64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i1 = fptosi <64 x float> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i1 = fptosi <64 x double> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64f32_v64i1 = fptosi <64 x float> undef to <64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f64_v64i1 = fptosi <64 x double> undef to <64 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i8 = fptosi <128 x float> undef to <128 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v128f64_v128i8 = fptosi <128 x double> undef to <128 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128f32_v128i16 = fptosi <128 x float> undef to <128 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128f64_v128i16 = fptosi <128 x double> undef to <128 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128f32_v128i32 = fptosi <128 x float> undef to <128 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128f64_v128i32 = fptosi <128 x double> undef to <128 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128f32_v128i64 = fptosi <128 x float> undef to <128 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v128f64_v128i64 = fptosi <128 x double> undef to <128 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i1 = fptosi <128 x float> undef to <128 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %v128f64_v128i1 = fptosi <128 x double> undef to <128 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128f32_v128i1 = fptosi <128 x float> undef to <128 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128f64_v128i1 = fptosi <128 x double> undef to <128 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f32_nxv1i8 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i8 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i16 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i16 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f64_nxv1i16 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i32 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i32 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64_nxv1i32 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i64 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64_nxv1i64 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i1 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f32_nxv1i1 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i1 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i8 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i8 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i8 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i16 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i16 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i16 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i32 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i32 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i64 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i64 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f32_nxv2i1 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i1 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i8 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i8 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i16 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i16 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i32 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i32 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f32_nxv4i64 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i64 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f32_nxv4i1 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i1 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f64_nxv4i1 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i8 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv8f64_nxv8i8 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i16 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i16 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i32 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f64_nxv8i32 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f32_nxv8i64 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f64_nxv8i64 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i1 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i1 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f32_nxv8i1 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f64_nxv8i1 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f32_nxv16i8 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv16f64_nxv16i8 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f32_nxv16i16 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i16 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i32 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16f64_nxv16i32 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16f32_nxv16i64 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f64_nxv16i64 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i1 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i1 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16f32_nxv16i1 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f64_nxv16i1 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv32f32_nxv32i8 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv32f64_nxv32i8 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32f32_nxv32i16 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i16 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32f32_nxv32i32 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32f64_nxv32i32 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32f32_nxv32i64 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f64_nxv32i64 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f32_nxv32i1 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i1 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32f32_nxv32i1 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f64_nxv32i1 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv64f32_nxv64i8 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv64f64_nxv64i8 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64f32_nxv64i16 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64f64_nxv64i16 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64f32_nxv64i32 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64f64_nxv64i32 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 69 for instruction: %nxv64f32_nxv64i64 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f64_nxv64i64 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %nxv64f32_nxv64i1 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64f64_nxv64i1 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64f32_nxv64i1 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64f64_nxv64i1 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; RV64-LABEL: 'fptosi'
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i8 = fptosi <2 x half> undef to <2 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f32_v2i8 = fptosi <2 x float> undef to <2 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i8 = fptosi <2 x double> undef to <2 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i16 = fptosi <2 x half> undef to <2 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i16 = fptosi <2 x float> undef to <2 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f64_v2i16 = fptosi <2 x double> undef to <2 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i32 = fptosi <2 x half> undef to <2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i32 = fptosi <2 x float> undef to <2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i32 = fptosi <2 x double> undef to <2 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptosi <2 x half> undef to <2 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i64 = fptosi <2 x float> undef to <2 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i64 = fptosi <2 x double> undef to <2 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i1 = fptosi <2 x half> undef to <2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f32_v2i1 = fptosi <2 x float> undef to <2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i1 = fptosi <2 x double> undef to <2 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i8 = fptosi <4 x half> undef to <4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i8 = fptosi <4 x float> undef to <4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i8 = fptosi <4 x double> undef to <4 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i16 = fptosi <4 x half> undef to <4 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i16 = fptosi <4 x float> undef to <4 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i16 = fptosi <4 x double> undef to <4 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i32 = fptosi <4 x float> undef to <4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i32 = fptosi <4 x double> undef to <4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i64 = fptosi <4 x float> undef to <4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i64 = fptosi <4 x double> undef to <4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f32_v4i1 = fptosi <4 x float> undef to <4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i1 = fptosi <4 x double> undef to <4 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i8 = fptosi <8 x float> undef to <8 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i8 = fptosi <8 x double> undef to <8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i16 = fptosi <8 x float> undef to <8 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i16 = fptosi <8 x double> undef to <8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i32 = fptosi <8 x float> undef to <8 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i32 = fptosi <8 x double> undef to <8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f32_v8i64 = fptosi <8 x float> undef to <8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i64 = fptosi <8 x double> undef to <8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f32_v8i1 = fptosi <8 x float> undef to <8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i1 = fptosi <8 x double> undef to <8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f64_v8i1 = fptosi <8 x double> undef to <8 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i8 = fptosi <16 x float> undef to <16 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v16f64_v16i8 = fptosi <16 x double> undef to <16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i16 = fptosi <16 x float> undef to <16 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i16 = fptosi <16 x double> undef to <16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i32 = fptosi <16 x float> undef to <16 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f64_v16i32 = fptosi <16 x double> undef to <16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f32_v16i64 = fptosi <16 x float> undef to <16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f64_v16i64 = fptosi <16 x double> undef to <16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i1 = fptosi <16 x float> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i1 = fptosi <16 x double> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f32_v16i1 = fptosi <16 x float> undef to <16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f64_v16i1 = fptosi <16 x double> undef to <16 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i8 = fptosi <32 x float> undef to <32 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v32f64_v32i8 = fptosi <32 x double> undef to <32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f32_v32i16 = fptosi <32 x float> undef to <32 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i16 = fptosi <32 x double> undef to <32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f32_v32i32 = fptosi <32 x float> undef to <32 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32f64_v32i32 = fptosi <32 x double> undef to <32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32f32_v32i64 = fptosi <32 x float> undef to <32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f64_v32i64 = fptosi <32 x double> undef to <32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i1 = fptosi <32 x float> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i1 = fptosi <32 x double> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32f32_v32i1 = fptosi <32 x float> undef to <32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f64_v32i1 = fptosi <32 x double> undef to <32 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i8 = fptosi <64 x float> undef to <64 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v64f64_v64i8 = fptosi <64 x double> undef to <64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64f32_v64i16 = fptosi <64 x float> undef to <64 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i16 = fptosi <64 x double> undef to <64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64f32_v64i32 = fptosi <64 x float> undef to <64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64f64_v64i32 = fptosi <64 x double> undef to <64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64f32_v64i64 = fptosi <64 x float> undef to <64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f64_v64i64 = fptosi <64 x double> undef to <64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i1 = fptosi <64 x float> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i1 = fptosi <64 x double> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64f32_v64i1 = fptosi <64 x float> undef to <64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f64_v64i1 = fptosi <64 x double> undef to <64 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i8 = fptosi <128 x float> undef to <128 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v128f64_v128i8 = fptosi <128 x double> undef to <128 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128f32_v128i16 = fptosi <128 x float> undef to <128 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128f64_v128i16 = fptosi <128 x double> undef to <128 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128f32_v128i32 = fptosi <128 x float> undef to <128 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128f64_v128i32 = fptosi <128 x double> undef to <128 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128f32_v128i64 = fptosi <128 x float> undef to <128 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v128f64_v128i64 = fptosi <128 x double> undef to <128 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i1 = fptosi <128 x float> undef to <128 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %v128f64_v128i1 = fptosi <128 x double> undef to <128 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128f32_v128i1 = fptosi <128 x float> undef to <128 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128f64_v128i1 = fptosi <128 x double> undef to <128 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f32_nxv1i8 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i8 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i16 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i16 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f64_nxv1i16 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i32 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i32 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64_nxv1i32 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i64 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64_nxv1i64 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i1 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f32_nxv1i1 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i1 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i8 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i8 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i8 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i16 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i16 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i16 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i32 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i32 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i64 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i64 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f32_nxv2i1 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i1 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i8 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i8 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i16 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i16 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i32 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i32 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f32_nxv4i64 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i64 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f32_nxv4i1 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i1 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f64_nxv4i1 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i8 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv8f64_nxv8i8 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i16 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i16 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i32 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f64_nxv8i32 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f32_nxv8i64 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f64_nxv8i64 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i1 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i1 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f32_nxv8i1 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f64_nxv8i1 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f32_nxv16i8 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv16f64_nxv16i8 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f32_nxv16i16 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i16 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i32 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16f64_nxv16i32 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16f32_nxv16i64 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f64_nxv16i64 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i1 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i1 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16f32_nxv16i1 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f64_nxv16i1 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv32f32_nxv32i8 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv32f64_nxv32i8 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32f32_nxv32i16 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i16 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32f32_nxv32i32 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32f64_nxv32i32 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32f32_nxv32i64 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f64_nxv32i64 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f32_nxv32i1 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i1 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32f32_nxv32i1 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f64_nxv32i1 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv64f32_nxv64i8 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv64f64_nxv64i8 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64f32_nxv64i16 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64f64_nxv64i16 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64f32_nxv64i32 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64f64_nxv64i32 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64f32_nxv64i64 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv64f64_nxv64i64 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %nxv64f32_nxv64i1 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64f64_nxv64i1 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64f32_nxv64i1 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64f64_nxv64i1 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
- %v2f16_v2i8 = fptosi <2 x half> undef to <2 x i8>
%v2f32_v2i8 = fptosi <2 x float> undef to <2 x i8>
%v2f64_v2i8 = fptosi <2 x double> undef to <2 x i8>
- %v2f16_v2i16 = fptosi <2 x half> undef to <2 x i16>
%v2f32_v2i16 = fptosi <2 x float> undef to <2 x i16>
%v2f64_v2i16 = fptosi <2 x double> undef to <2 x i16>
- %v2f16_v2i32 = fptosi <2 x half> undef to <2 x i32>
%v2f32_v2i32 = fptosi <2 x float> undef to <2 x i32>
%v2f64_v2i32 = fptosi <2 x double> undef to <2 x i32>
- %v2f16_v2i64 = fptosi <2 x half> undef to <2 x i64>
%v2f32_v2i64 = fptosi <2 x float> undef to <2 x i64>
%v2f64_v2i64 = fptosi <2 x double> undef to <2 x i64>
- %v2f16_v2i1 = fptosi <2 x half> undef to <2 x i1>
%v2f32_v2i1 = fptosi <2 x float> undef to <2 x i1>
%v2f64_v2i1 = fptosi <2 x double> undef to <2 x i1>
- %v4f16_v4i8 = fptosi <4 x half> undef to <4 x i8>
%v4f32_v4i8 = fptosi <4 x float> undef to <4 x i8>
%v4f64_v4i8 = fptosi <4 x double> undef to <4 x i8>
- %v4f16_v4i16 = fptosi <4 x half> undef to <4 x i16>
%v4f32_v4i16 = fptosi <4 x float> undef to <4 x i16>
%v4f64_v4i16 = fptosi <4 x double> undef to <4 x i16>
- %v4f16_v4i32 = fptosi <4 x half> undef to <4 x i32>
%v4f32_v4i32 = fptosi <4 x float> undef to <4 x i32>
%v4f64_v4i32 = fptosi <4 x double> undef to <4 x i32>
- %v4f16_v4i64 = fptosi <4 x half> undef to <4 x i64>
%v4f32_v4i64 = fptosi <4 x float> undef to <4 x i64>
%v4f64_v4i64 = fptosi <4 x double> undef to <4 x i64>
- %v4f16_v4i1 = fptosi <4 x half> undef to <4 x i1>
%v4f32_v4i1 = fptosi <4 x float> undef to <4 x i1>
%v4f64_v4i1 = fptosi <4 x double> undef to <4 x i1>
- %v8f16_v8i8 = fptosi <8 x half> undef to <8 x i8>
%v8f32_v8i8 = fptosi <8 x float> undef to <8 x i8>
%v8f64_v8i8 = fptosi <8 x double> undef to <8 x i8>
- %v8f16_v8i16 = fptosi <8 x half> undef to <8 x i16>
%v8f32_v8i16 = fptosi <8 x float> undef to <8 x i16>
%v8f64_v8i16 = fptosi <8 x double> undef to <8 x i16>
- %v8f16_v8i32 = fptosi <8 x half> undef to <8 x i32>
%v8f32_v8i32 = fptosi <8 x float> undef to <8 x i32>
%v8f64_v8i32 = fptosi <8 x double> undef to <8 x i32>
- %v8f16_v8i64 = fptosi <8 x half> undef to <8 x i64>
%v8f32_v8i64 = fptosi <8 x float> undef to <8 x i64>
%v8f64_v8i64 = fptosi <8 x double> undef to <8 x i64>
- %v8f16_v8i1 = fptosi <8 x half> undef to <8 x i1>
%v8f32_v8i1 = fptosi <8 x float> undef to <8 x i1>
%v8f64_v8i1 = fptosi <8 x double> undef to <8 x i1>
- %v16f16_v16i8 = fptosi <16 x half> undef to <16 x i8>
%v16f32_v16i8 = fptosi <16 x float> undef to <16 x i8>
%v16f64_v16i8 = fptosi <16 x double> undef to <16 x i8>
- %v16f16_v16i16 = fptosi <16 x half> undef to <16 x i16>
%v16f32_v16i16 = fptosi <16 x float> undef to <16 x i16>
%v16f64_v16i16 = fptosi <16 x double> undef to <16 x i16>
- %v16f16_v16i32 = fptosi <16 x half> undef to <16 x i32>
%v16f32_v16i32 = fptosi <16 x float> undef to <16 x i32>
%v16f64_v16i32 = fptosi <16 x double> undef to <16 x i32>
- %v16f16_v16i64 = fptosi <16 x half> undef to <16 x i64>
%v16f32_v16i64 = fptosi <16 x float> undef to <16 x i64>
%v16f64_v16i64 = fptosi <16 x double> undef to <16 x i64>
- %v16f16_v16i1 = fptosi <16 x half> undef to <16 x i1>
%v16f32_v16i1 = fptosi <16 x float> undef to <16 x i1>
%v16f64_v16i1 = fptosi <16 x double> undef to <16 x i1>
- %v32f16_v32i8 = fptosi <32 x half> undef to <32 x i8>
%v32f32_v32i8 = fptosi <32 x float> undef to <32 x i8>
%v32f64_v32i8 = fptosi <32 x double> undef to <32 x i8>
- %v32f16_v32i16 = fptosi <32 x half> undef to <32 x i16>
%v32f32_v32i16 = fptosi <32 x float> undef to <32 x i16>
%v32f64_v32i16 = fptosi <32 x double> undef to <32 x i16>
- %v32f16_v32i32 = fptosi <32 x half> undef to <32 x i32>
%v32f32_v32i32 = fptosi <32 x float> undef to <32 x i32>
%v32f64_v32i32 = fptosi <32 x double> undef to <32 x i32>
- %v32f16_v32i64 = fptosi <32 x half> undef to <32 x i64>
%v32f32_v32i64 = fptosi <32 x float> undef to <32 x i64>
%v32f64_v32i64 = fptosi <32 x double> undef to <32 x i64>
- %v32f16_v32i1 = fptosi <32 x half> undef to <32 x i1>
%v32f32_v32i1 = fptosi <32 x float> undef to <32 x i1>
%v32f64_v32i1 = fptosi <32 x double> undef to <32 x i1>
- %v64f16_v64i8 = fptosi <64 x half> undef to <64 x i8>
%v64f32_v64i8 = fptosi <64 x float> undef to <64 x i8>
%v64f64_v64i8 = fptosi <64 x double> undef to <64 x i8>
- %v64f16_v64i16 = fptosi <64 x half> undef to <64 x i16>
%v64f32_v64i16 = fptosi <64 x float> undef to <64 x i16>
%v64f64_v64i16 = fptosi <64 x double> undef to <64 x i16>
- %v64f16_v64i32 = fptosi <64 x half> undef to <64 x i32>
%v64f32_v64i32 = fptosi <64 x float> undef to <64 x i32>
%v64f64_v64i32 = fptosi <64 x double> undef to <64 x i32>
- %v64f16_v64i64 = fptosi <64 x half> undef to <64 x i64>
%v64f32_v64i64 = fptosi <64 x float> undef to <64 x i64>
%v64f64_v64i64 = fptosi <64 x double> undef to <64 x i64>
- %v64f16_v64i1 = fptosi <64 x half> undef to <64 x i1>
%v64f32_v64i1 = fptosi <64 x float> undef to <64 x i1>
%v64f64_v64i1 = fptosi <64 x double> undef to <64 x i1>
- %v128f16_v128i8 = fptosi <128 x half> undef to <128 x i8>
%v128f32_v128i8 = fptosi <128 x float> undef to <128 x i8>
%v128f64_v128i8 = fptosi <128 x double> undef to <128 x i8>
- %v128f16_v128i16 = fptosi <128 x half> undef to <128 x i16>
%v128f32_v128i16 = fptosi <128 x float> undef to <128 x i16>
%v128f64_v128i16 = fptosi <128 x double> undef to <128 x i16>
- %v128f16_v128i32 = fptosi <128 x half> undef to <128 x i32>
%v128f32_v128i32 = fptosi <128 x float> undef to <128 x i32>
%v128f64_v128i32 = fptosi <128 x double> undef to <128 x i32>
- %v128f16_v128i64 = fptosi <128 x half> undef to <128 x i64>
%v128f32_v128i64 = fptosi <128 x float> undef to <128 x i64>
%v128f64_v128i64 = fptosi <128 x double> undef to <128 x i64>
- %v128f16_v128i1 = fptosi <128 x half> undef to <128 x i1>
%v128f32_v128i1 = fptosi <128 x float> undef to <128 x i1>
%v128f64_v128i1 = fptosi <128 x double> undef to <128 x i1>
- %nxv1f16_nxv1i8 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i8>
%nxv1f32_nxv1i8 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i8>
%nxv1f64_nxv1i8 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i8>
- %nxv1f16_nxv1i16 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i16>
%nxv1f32_nxv1i16 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i16>
%nxv1f64_nxv1i16 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i16>
- %nxv1f16_nxv1i32 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i32>
%nxv1f32_nxv1i32 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i32>
%nxv1f64_nxv1i32 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i32>
- %nxv1f16_nxv1i64 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i64>
%nxv1f32_nxv1i64 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i64>
%nxv1f64_nxv1i64 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i64>
- %nxv1f16_nxv1i1 = fptosi <vscale x 1 x half> undef to <vscale x 1 x i1>
%nxv1f32_nxv1i1 = fptosi <vscale x 1 x float> undef to <vscale x 1 x i1>
%nxv1f64_nxv1i1 = fptosi <vscale x 1 x double> undef to <vscale x 1 x i1>
- %nxv2f16_nxv2i8 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i8>
%nxv2f32_nxv2i8 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i8>
%nxv2f64_nxv2i8 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i8>
- %nxv2f16_nxv2i16 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i16>
%nxv2f32_nxv2i16 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i16>
%nxv2f64_nxv2i16 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i16>
- %nxv2f16_nxv2i32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
%nxv2f32_nxv2i32 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i32>
%nxv2f64_nxv2i32 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i32>
- %nxv2f16_nxv2i64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
%nxv2f32_nxv2i64 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i64>
%nxv2f64_nxv2i64 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i64>
- %nxv2f16_nxv2i1 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i1>
%nxv2f32_nxv2i1 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i1>
%nxv2f64_nxv2i1 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i1>
- %nxv4f16_nxv4i8 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
%nxv4f32_nxv4i8 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i8>
%nxv4f64_nxv4i8 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i8>
- %nxv4f16_nxv4i16 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i16>
%nxv4f32_nxv4i16 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i16>
%nxv4f64_nxv4i16 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i16>
- %nxv4f16_nxv4i32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
%nxv4f32_nxv4i32 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i32>
%nxv4f64_nxv4i32 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i32>
- %nxv4f16_nxv4i64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
%nxv4f32_nxv4i64 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i64>
%nxv4f64_nxv4i64 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i64>
- %nxv4f16_nxv4i1 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i1>
%nxv4f32_nxv4i1 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i1>
%nxv4f64_nxv4i1 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i1>
- %nxv8f16_nxv8i8 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
%nxv8f32_nxv8i8 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i8>
%nxv8f64_nxv8i8 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i8>
- %nxv8f16_nxv8i16 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i16>
%nxv8f32_nxv8i16 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i16>
%nxv8f64_nxv8i16 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i16>
- %nxv8f16_nxv8i32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
%nxv8f32_nxv8i32 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i32>
%nxv8f64_nxv8i32 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i32>
- %nxv8f16_nxv8i64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
%nxv8f32_nxv8i64 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i64>
%nxv8f64_nxv8i64 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i64>
- %nxv8f16_nxv8i1 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i1>
%nxv8f32_nxv8i1 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i1>
%nxv8f64_nxv8i1 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i1>
- %nxv16f16_nxv16i8 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i8>
%nxv16f32_nxv16i8 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i8>
%nxv16f64_nxv16i8 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i8>
- %nxv16f16_nxv16i16 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i16>
%nxv16f32_nxv16i16 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i16>
%nxv16f64_nxv16i16 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i16>
- %nxv16f16_nxv16i32 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i32>
%nxv16f32_nxv16i32 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i32>
%nxv16f64_nxv16i32 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i32>
- %nxv16f16_nxv16i64 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i64>
%nxv16f32_nxv16i64 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i64>
%nxv16f64_nxv16i64 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i64>
- %nxv16f16_nxv16i1 = fptosi <vscale x 16 x half> undef to <vscale x 16 x i1>
%nxv16f32_nxv16i1 = fptosi <vscale x 16 x float> undef to <vscale x 16 x i1>
%nxv16f64_nxv16i1 = fptosi <vscale x 16 x double> undef to <vscale x 16 x i1>
- %nxv32f16_nxv32i8 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i8>
%nxv32f32_nxv32i8 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i8>
%nxv32f64_nxv32i8 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i8>
- %nxv32f16_nxv32i16 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i16>
%nxv32f32_nxv32i16 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i16>
%nxv32f64_nxv32i16 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i16>
- %nxv32f16_nxv32i32 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i32>
%nxv32f32_nxv32i32 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i32>
%nxv32f64_nxv32i32 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i32>
- %nxv32f16_nxv32i64 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i64>
%nxv32f32_nxv32i64 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i64>
%nxv32f64_nxv32i64 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i64>
- %nxv32f16_nxv32i1 = fptosi <vscale x 32 x half> undef to <vscale x 32 x i1>
%nxv32f32_nxv32i1 = fptosi <vscale x 32 x float> undef to <vscale x 32 x i1>
%nxv32f64_nxv32i1 = fptosi <vscale x 32 x double> undef to <vscale x 32 x i1>
- %nxv64f16_nxv64i8 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i8>
%nxv64f32_nxv64i8 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i8>
%nxv64f64_nxv64i8 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i8>
- %nxv64f16_nxv64i16 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i16>
%nxv64f32_nxv64i16 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i16>
%nxv64f64_nxv64i16 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i16>
- %nxv64f16_nxv64i32 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i32>
%nxv64f32_nxv64i32 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i32>
%nxv64f64_nxv64i32 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i32>
- %nxv64f16_nxv64i64 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i64>
%nxv64f32_nxv64i64 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i64>
%nxv64f64_nxv64i64 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i64>
- %nxv64f16_nxv64i1 = fptosi <vscale x 64 x half> undef to <vscale x 64 x i1>
%nxv64f32_nxv64i1 = fptosi <vscale x 64 x float> undef to <vscale x 64 x i1>
%nxv64f64_nxv64i1 = fptosi <vscale x 64 x double> undef to <vscale x 64 x i1>
@@ -2355,652 +2145,442 @@ define void @fptosi() {
define void @fptoui() {
; RV32-LABEL: 'fptoui'
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i8 = fptoui <2 x half> undef to <2 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f32_v2i8 = fptoui <2 x float> undef to <2 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i8 = fptoui <2 x double> undef to <2 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i16 = fptoui <2 x half> undef to <2 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i16 = fptoui <2 x float> undef to <2 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f64_v2i16 = fptoui <2 x double> undef to <2 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i32 = fptoui <2 x half> undef to <2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i32 = fptoui <2 x float> undef to <2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i32 = fptoui <2 x double> undef to <2 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptoui <2 x half> undef to <2 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i64 = fptoui <2 x float> undef to <2 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i64 = fptoui <2 x double> undef to <2 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i1 = fptoui <2 x half> undef to <2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f32_v2i1 = fptoui <2 x float> undef to <2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i1 = fptoui <2 x double> undef to <2 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i8 = fptoui <4 x half> undef to <4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i8 = fptoui <4 x float> undef to <4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i8 = fptoui <4 x double> undef to <4 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i16 = fptoui <4 x half> undef to <4 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i16 = fptoui <4 x float> undef to <4 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i16 = fptoui <4 x double> undef to <4 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i32 = fptoui <4 x float> undef to <4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i32 = fptoui <4 x double> undef to <4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i64 = fptoui <4 x float> undef to <4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i64 = fptoui <4 x double> undef to <4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f32_v4i1 = fptoui <4 x float> undef to <4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i1 = fptoui <4 x double> undef to <4 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i8 = fptoui <8 x float> undef to <8 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i8 = fptoui <8 x double> undef to <8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i16 = fptoui <8 x float> undef to <8 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i16 = fptoui <8 x double> undef to <8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i32 = fptoui <8 x float> undef to <8 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i32 = fptoui <8 x double> undef to <8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f32_v8i64 = fptoui <8 x float> undef to <8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i64 = fptoui <8 x double> undef to <8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f32_v8i1 = fptoui <8 x float> undef to <8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i1 = fptoui <8 x double> undef to <8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f64_v8i1 = fptoui <8 x double> undef to <8 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i8 = fptoui <16 x float> undef to <16 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v16f64_v16i8 = fptoui <16 x double> undef to <16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i16 = fptoui <16 x float> undef to <16 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i16 = fptoui <16 x double> undef to <16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i32 = fptoui <16 x float> undef to <16 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f64_v16i32 = fptoui <16 x double> undef to <16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f32_v16i64 = fptoui <16 x float> undef to <16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f64_v16i64 = fptoui <16 x double> undef to <16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i1 = fptoui <16 x float> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i1 = fptoui <16 x double> undef to <16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f32_v16i1 = fptoui <16 x float> undef to <16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f64_v16i1 = fptoui <16 x double> undef to <16 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i8 = fptoui <32 x float> undef to <32 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v32f64_v32i8 = fptoui <32 x double> undef to <32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f32_v32i16 = fptoui <32 x float> undef to <32 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i16 = fptoui <32 x double> undef to <32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f32_v32i32 = fptoui <32 x float> undef to <32 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32f64_v32i32 = fptoui <32 x double> undef to <32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32f32_v32i64 = fptoui <32 x float> undef to <32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f64_v32i64 = fptoui <32 x double> undef to <32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i1 = fptoui <32 x float> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i1 = fptoui <32 x double> undef to <32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32f32_v32i1 = fptoui <32 x float> undef to <32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f64_v32i1 = fptoui <32 x double> undef to <32 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i8 = fptoui <64 x float> undef to <64 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v64f64_v64i8 = fptoui <64 x double> undef to <64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64f32_v64i16 = fptoui <64 x float> undef to <64 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i16 = fptoui <64 x double> undef to <64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64f32_v64i32 = fptoui <64 x float> undef to <64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64f64_v64i32 = fptoui <64 x double> undef to <64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64f32_v64i64 = fptoui <64 x float> undef to <64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f64_v64i64 = fptoui <64 x double> undef to <64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i1 = fptoui <64 x float> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i1 = fptoui <64 x double> undef to <64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64f32_v64i1 = fptoui <64 x float> undef to <64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f64_v64i1 = fptoui <64 x double> undef to <64 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i8 = fptoui <128 x float> undef to <128 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v128f64_v128i8 = fptoui <128 x double> undef to <128 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128f32_v128i16 = fptoui <128 x float> undef to <128 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128f64_v128i16 = fptoui <128 x double> undef to <128 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128f32_v128i32 = fptoui <128 x float> undef to <128 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128f64_v128i32 = fptoui <128 x double> undef to <128 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128f32_v128i64 = fptoui <128 x float> undef to <128 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v128f64_v128i64 = fptoui <128 x double> undef to <128 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i1 = fptoui <128 x float> undef to <128 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %v128f64_v128i1 = fptoui <128 x double> undef to <128 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128f32_v128i1 = fptoui <128 x float> undef to <128 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128f64_v128i1 = fptoui <128 x double> undef to <128 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f32_nxv1i8 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i8 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i16 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i16 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f64_nxv1i16 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i32 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i32 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64_nxv1i32 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i64 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64_nxv1i64 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i1 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f32_nxv1i1 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i1 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i8 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i8 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i8 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i16 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i16 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i16 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i32 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i32 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i64 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i64 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f32_nxv2i1 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i1 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i8 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i8 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i16 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i16 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i32 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i32 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f32_nxv4i64 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i64 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f32_nxv4i1 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i1 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f64_nxv4i1 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i8 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv8f64_nxv8i8 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i16 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i16 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i32 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f64_nxv8i32 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f32_nxv8i64 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f64_nxv8i64 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i1 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i1 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f32_nxv8i1 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f64_nxv8i1 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f32_nxv16i8 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv16f64_nxv16i8 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f32_nxv16i16 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i16 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i32 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16f64_nxv16i32 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16f32_nxv16i64 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f64_nxv16i64 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i1 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i1 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16f32_nxv16i1 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f64_nxv16i1 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv32f32_nxv32i8 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv32f64_nxv32i8 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32f32_nxv32i16 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i16 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32f32_nxv32i32 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32f64_nxv32i32 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32f32_nxv32i64 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f64_nxv32i64 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f32_nxv32i1 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i1 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32f32_nxv32i1 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f64_nxv32i1 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv64f32_nxv64i8 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i8>
; RV32-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv64f64_nxv64i8 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i8>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64f32_nxv64i16 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i16>
; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64f64_nxv64i16 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i16>
-; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64f32_nxv64i32 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i32>
; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64f64_nxv64i32 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i32>
-; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 69 for instruction: %nxv64f32_nxv64i64 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i64>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f64_nxv64i64 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i64>
-; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %nxv64f32_nxv64i1 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i1>
-; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64f64_nxv64i1 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64f32_nxv64i1 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i1>
+; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64f64_nxv64i1 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i1>
; RV32-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; RV64-LABEL: 'fptoui'
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i8 = fptoui <2 x half> undef to <2 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f32_v2i8 = fptoui <2 x float> undef to <2 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i8 = fptoui <2 x double> undef to <2 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i16 = fptoui <2 x half> undef to <2 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i16 = fptoui <2 x float> undef to <2 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f64_v2i16 = fptoui <2 x double> undef to <2 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_v2i32 = fptoui <2 x half> undef to <2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i32 = fptoui <2 x float> undef to <2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i32 = fptoui <2 x double> undef to <2 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16_v2i64 = fptoui <2 x half> undef to <2 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_v2i64 = fptoui <2 x float> undef to <2 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_v2i64 = fptoui <2 x double> undef to <2 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16_v2i1 = fptoui <2 x half> undef to <2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f32_v2i1 = fptoui <2 x float> undef to <2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64_v2i1 = fptoui <2 x double> undef to <2 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i8 = fptoui <4 x half> undef to <4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i8 = fptoui <4 x float> undef to <4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i8 = fptoui <4 x double> undef to <4 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i16 = fptoui <4 x half> undef to <4 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i16 = fptoui <4 x float> undef to <4 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i16 = fptoui <4 x double> undef to <4 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_v4i32 = fptoui <4 x float> undef to <4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_v4i32 = fptoui <4 x double> undef to <4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f32_v4i64 = fptoui <4 x float> undef to <4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_v4i64 = fptoui <4 x double> undef to <4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f32_v4i1 = fptoui <4 x float> undef to <4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64_v4i1 = fptoui <4 x double> undef to <4 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i8 = fptoui <8 x float> undef to <8 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i8 = fptoui <8 x double> undef to <8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_v8i16 = fptoui <8 x float> undef to <8 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f64_v8i16 = fptoui <8 x double> undef to <8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f32_v8i32 = fptoui <8 x float> undef to <8 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_v8i32 = fptoui <8 x double> undef to <8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f32_v8i64 = fptoui <8 x float> undef to <8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i64 = fptoui <8 x double> undef to <8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f32_v8i1 = fptoui <8 x float> undef to <8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f64_v8i1 = fptoui <8 x double> undef to <8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8f64_v8i1 = fptoui <8 x double> undef to <8 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f32_v16i8 = fptoui <16 x float> undef to <16 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v16f64_v16i8 = fptoui <16 x double> undef to <16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16f32_v16i16 = fptoui <16 x float> undef to <16 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i16 = fptoui <16 x double> undef to <16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i32 = fptoui <16 x float> undef to <16 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f64_v16i32 = fptoui <16 x double> undef to <16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f32_v16i64 = fptoui <16 x float> undef to <16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16f64_v16i64 = fptoui <16 x double> undef to <16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16f32_v16i1 = fptoui <16 x float> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f64_v16i1 = fptoui <16 x double> undef to <16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16f32_v16i1 = fptoui <16 x float> undef to <16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16f64_v16i1 = fptoui <16 x double> undef to <16 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i8 = fptoui <32 x float> undef to <32 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %v32f64_v32i8 = fptoui <32 x double> undef to <32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f32_v32i16 = fptoui <32 x float> undef to <32 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i16 = fptoui <32 x double> undef to <32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32f32_v32i32 = fptoui <32 x float> undef to <32 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32f64_v32i32 = fptoui <32 x double> undef to <32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32f32_v32i64 = fptoui <32 x float> undef to <32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v32f64_v32i64 = fptoui <32 x double> undef to <32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v32f32_v32i1 = fptoui <32 x float> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32f64_v32i1 = fptoui <32 x double> undef to <32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32f32_v32i1 = fptoui <32 x float> undef to <32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32f64_v32i1 = fptoui <32 x double> undef to <32 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i8 = fptoui <64 x float> undef to <64 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %v64f64_v64i8 = fptoui <64 x double> undef to <64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64f32_v64i16 = fptoui <64 x float> undef to <64 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i16 = fptoui <64 x double> undef to <64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v64f32_v64i32 = fptoui <64 x float> undef to <64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64f64_v64i32 = fptoui <64 x double> undef to <64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64f32_v64i64 = fptoui <64 x float> undef to <64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v64f64_v64i64 = fptoui <64 x double> undef to <64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v64f32_v64i1 = fptoui <64 x float> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64f64_v64i1 = fptoui <64 x double> undef to <64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64f32_v64i1 = fptoui <64 x float> undef to <64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64f64_v64i1 = fptoui <64 x double> undef to <64 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i8 = fptoui <128 x float> undef to <128 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %v128f64_v128i8 = fptoui <128 x double> undef to <128 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128f32_v128i16 = fptoui <128 x float> undef to <128 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128f64_v128i16 = fptoui <128 x double> undef to <128 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v128f32_v128i32 = fptoui <128 x float> undef to <128 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128f64_v128i32 = fptoui <128 x double> undef to <128 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128f32_v128i64 = fptoui <128 x float> undef to <128 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v128f64_v128i64 = fptoui <128 x double> undef to <128 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v128f32_v128i1 = fptoui <128 x float> undef to <128 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %v128f64_v128i1 = fptoui <128 x double> undef to <128 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i8 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128f32_v128i1 = fptoui <128 x float> undef to <128 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128f64_v128i1 = fptoui <128 x double> undef to <128 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f32_nxv1i8 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i8 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i16 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i16 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f64_nxv1i16 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f16_nxv1i32 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i32 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64_nxv1i32 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1f16_nxv1i64 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f32_nxv1i64 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1f64_nxv1i64 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f16_nxv1i1 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f32_nxv1i1 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1f64_nxv1i1 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i8 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i8 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i8 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i16 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i16 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i16 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_nxv2i32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_nxv2i32 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_nxv2i32 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f32_nxv2i64 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_nxv2i64 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f16_nxv2i1 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f32_nxv2i1 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2f64_nxv2i1 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i8 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i8 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i8 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_nxv4i16 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_nxv4i16 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f64_nxv4i16 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f32_nxv4i32 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_nxv4i32 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f32_nxv4i64 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i64 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f16_nxv4i1 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4f32_nxv4i1 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4f64_nxv4i1 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_nxv8i8 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4f64_nxv4i1 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f32_nxv8i8 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %nxv8f64_nxv8i8 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f32_nxv8i16 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i16 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i32 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f64_nxv8i32 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f32_nxv8i64 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8f64_nxv8i64 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv8f16_nxv8i1 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8f32_nxv8i1 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f64_nxv8i1 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8f32_nxv8i1 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8f64_nxv8i1 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f32_nxv16i8 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %nxv16f64_nxv16i8 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16f32_nxv16i16 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i16 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i32 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16f64_nxv16i32 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16f32_nxv16i64 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv16f64_nxv16i64 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16f32_nxv16i1 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16f64_nxv16i1 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16f32_nxv16i1 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16f64_nxv16i1 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv32f32_nxv32i8 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %nxv32f64_nxv32i8 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32f32_nxv32i16 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i16 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32f32_nxv32i32 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32f64_nxv32i32 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32f32_nxv32i64 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv32f64_nxv32i64 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32f32_nxv32i1 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32f64_nxv32i1 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
+; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32f32_nxv32i1 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32f64_nxv32i1 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv64f32_nxv64i8 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i8>
; RV64-NEXT: Cost Model: Found an estimated cost of 63 for instruction: %nxv64f64_nxv64i8 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i8>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64f16_nxv64i16 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64f32_nxv64i16 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i16>
; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64f64_nxv64i16 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i16>
-; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64f32_nxv64i32 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i32>
; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64f64_nxv64i32 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i32>
-; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64f32_nxv64i64 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i64>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv64f64_nxv64i64 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i64>
-; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %nxv64f32_nxv64i1 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i1>
-; RV64-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64f64_nxv64i1 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64f32_nxv64i1 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i1>
+; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64f64_nxv64i1 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i1>
; RV64-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
- %v2f16_v2i8 = fptoui <2 x half> undef to <2 x i8>
%v2f32_v2i8 = fptoui <2 x float> undef to <2 x i8>
%v2f64_v2i8 = fptoui <2 x double> undef to <2 x i8>
- %v2f16_v2i16 = fptoui <2 x half> undef to <2 x i16>
%v2f32_v2i16 = fptoui <2 x float> undef to <2 x i16>
%v2f64_v2i16 = fptoui <2 x double> undef to <2 x i16>
- %v2f16_v2i32 = fptoui <2 x half> undef to <2 x i32>
%v2f32_v2i32 = fptoui <2 x float> undef to <2 x i32>
%v2f64_v2i32 = fptoui <2 x double> undef to <2 x i32>
- %v2f16_v2i64 = fptoui <2 x half> undef to <2 x i64>
%v2f32_v2i64 = fptoui <2 x float> undef to <2 x i64>
%v2f64_v2i64 = fptoui <2 x double> undef to <2 x i64>
- %v2f16_v2i1 = fptoui <2 x half> undef to <2 x i1>
%v2f32_v2i1 = fptoui <2 x float> undef to <2 x i1>
%v2f64_v2i1 = fptoui <2 x double> undef to <2 x i1>
- %v4f16_v4i8 = fptoui <4 x half> undef to <4 x i8>
%v4f32_v4i8 = fptoui <4 x float> undef to <4 x i8>
%v4f64_v4i8 = fptoui <4 x double> undef to <4 x i8>
- %v4f16_v4i16 = fptoui <4 x half> undef to <4 x i16>
%v4f32_v4i16 = fptoui <4 x float> undef to <4 x i16>
%v4f64_v4i16 = fptoui <4 x double> undef to <4 x i16>
- %v4f16_v4i32 = fptoui <4 x half> undef to <4 x i32>
%v4f32_v4i32 = fptoui <4 x float> undef to <4 x i32>
%v4f64_v4i32 = fptoui <4 x double> undef to <4 x i32>
- %v4f16_v4i64 = fptoui <4 x half> undef to <4 x i64>
%v4f32_v4i64 = fptoui <4 x float> undef to <4 x i64>
%v4f64_v4i64 = fptoui <4 x double> undef to <4 x i64>
- %v4f16_v4i1 = fptoui <4 x half> undef to <4 x i1>
%v4f32_v4i1 = fptoui <4 x float> undef to <4 x i1>
%v4f64_v4i1 = fptoui <4 x double> undef to <4 x i1>
- %v8f16_v8i8 = fptoui <8 x half> undef to <8 x i8>
%v8f32_v8i8 = fptoui <8 x float> undef to <8 x i8>
%v8f64_v8i8 = fptoui <8 x double> undef to <8 x i8>
- %v8f16_v8i16 = fptoui <8 x half> undef to <8 x i16>
%v8f32_v8i16 = fptoui <8 x float> undef to <8 x i16>
%v8f64_v8i16 = fptoui <8 x double> undef to <8 x i16>
- %v8f16_v8i32 = fptoui <8 x half> undef to <8 x i32>
%v8f32_v8i32 = fptoui <8 x float> undef to <8 x i32>
%v8f64_v8i32 = fptoui <8 x double> undef to <8 x i32>
- %v8f16_v8i64 = fptoui <8 x half> undef to <8 x i64>
%v8f32_v8i64 = fptoui <8 x float> undef to <8 x i64>
%v8f64_v8i64 = fptoui <8 x double> undef to <8 x i64>
- %v8f16_v8i1 = fptoui <8 x half> undef to <8 x i1>
%v8f32_v8i1 = fptoui <8 x float> undef to <8 x i1>
%v8f64_v8i1 = fptoui <8 x double> undef to <8 x i1>
- %v16f16_v16i8 = fptoui <16 x half> undef to <16 x i8>
%v16f32_v16i8 = fptoui <16 x float> undef to <16 x i8>
%v16f64_v16i8 = fptoui <16 x double> undef to <16 x i8>
- %v16f16_v16i16 = fptoui <16 x half> undef to <16 x i16>
%v16f32_v16i16 = fptoui <16 x float> undef to <16 x i16>
%v16f64_v16i16 = fptoui <16 x double> undef to <16 x i16>
- %v16f16_v16i32 = fptoui <16 x half> undef to <16 x i32>
%v16f32_v16i32 = fptoui <16 x float> undef to <16 x i32>
%v16f64_v16i32 = fptoui <16 x double> undef to <16 x i32>
- %v16f16_v16i64 = fptoui <16 x half> undef to <16 x i64>
%v16f32_v16i64 = fptoui <16 x float> undef to <16 x i64>
%v16f64_v16i64 = fptoui <16 x double> undef to <16 x i64>
- %v16f16_v16i1 = fptoui <16 x half> undef to <16 x i1>
%v16f32_v16i1 = fptoui <16 x float> undef to <16 x i1>
%v16f64_v16i1 = fptoui <16 x double> undef to <16 x i1>
- %v32f16_v32i8 = fptoui <32 x half> undef to <32 x i8>
%v32f32_v32i8 = fptoui <32 x float> undef to <32 x i8>
%v32f64_v32i8 = fptoui <32 x double> undef to <32 x i8>
- %v32f16_v32i16 = fptoui <32 x half> undef to <32 x i16>
%v32f32_v32i16 = fptoui <32 x float> undef to <32 x i16>
%v32f64_v32i16 = fptoui <32 x double> undef to <32 x i16>
- %v32f16_v32i32 = fptoui <32 x half> undef to <32 x i32>
%v32f32_v32i32 = fptoui <32 x float> undef to <32 x i32>
%v32f64_v32i32 = fptoui <32 x double> undef to <32 x i32>
- %v32f16_v32i64 = fptoui <32 x half> undef to <32 x i64>
%v32f32_v32i64 = fptoui <32 x float> undef to <32 x i64>
%v32f64_v32i64 = fptoui <32 x double> undef to <32 x i64>
- %v32f16_v32i1 = fptoui <32 x half> undef to <32 x i1>
%v32f32_v32i1 = fptoui <32 x float> undef to <32 x i1>
%v32f64_v32i1 = fptoui <32 x double> undef to <32 x i1>
- %v64f16_v64i8 = fptoui <64 x half> undef to <64 x i8>
%v64f32_v64i8 = fptoui <64 x float> undef to <64 x i8>
%v64f64_v64i8 = fptoui <64 x double> undef to <64 x i8>
- %v64f16_v64i16 = fptoui <64 x half> undef to <64 x i16>
%v64f32_v64i16 = fptoui <64 x float> undef to <64 x i16>
%v64f64_v64i16 = fptoui <64 x double> undef to <64 x i16>
- %v64f16_v64i32 = fptoui <64 x half> undef to <64 x i32>
%v64f32_v64i32 = fptoui <64 x float> undef to <64 x i32>
%v64f64_v64i32 = fptoui <64 x double> undef to <64 x i32>
- %v64f16_v64i64 = fptoui <64 x half> undef to <64 x i64>
%v64f32_v64i64 = fptoui <64 x float> undef to <64 x i64>
%v64f64_v64i64 = fptoui <64 x double> undef to <64 x i64>
- %v64f16_v64i1 = fptoui <64 x half> undef to <64 x i1>
%v64f32_v64i1 = fptoui <64 x float> undef to <64 x i1>
%v64f64_v64i1 = fptoui <64 x double> undef to <64 x i1>
- %v128f16_v128i8 = fptoui <128 x half> undef to <128 x i8>
%v128f32_v128i8 = fptoui <128 x float> undef to <128 x i8>
%v128f64_v128i8 = fptoui <128 x double> undef to <128 x i8>
- %v128f16_v128i16 = fptoui <128 x half> undef to <128 x i16>
%v128f32_v128i16 = fptoui <128 x float> undef to <128 x i16>
%v128f64_v128i16 = fptoui <128 x double> undef to <128 x i16>
- %v128f16_v128i32 = fptoui <128 x half> undef to <128 x i32>
%v128f32_v128i32 = fptoui <128 x float> undef to <128 x i32>
%v128f64_v128i32 = fptoui <128 x double> undef to <128 x i32>
- %v128f16_v128i64 = fptoui <128 x half> undef to <128 x i64>
%v128f32_v128i64 = fptoui <128 x float> undef to <128 x i64>
%v128f64_v128i64 = fptoui <128 x double> undef to <128 x i64>
- %v128f16_v128i1 = fptoui <128 x half> undef to <128 x i1>
%v128f32_v128i1 = fptoui <128 x float> undef to <128 x i1>
%v128f64_v128i1 = fptoui <128 x double> undef to <128 x i1>
- %nxv1f16_nxv1i8 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i8>
%nxv1f32_nxv1i8 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i8>
%nxv1f64_nxv1i8 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i8>
- %nxv1f16_nxv1i16 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i16>
%nxv1f32_nxv1i16 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i16>
%nxv1f64_nxv1i16 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i16>
- %nxv1f16_nxv1i32 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i32>
%nxv1f32_nxv1i32 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i32>
%nxv1f64_nxv1i32 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i32>
- %nxv1f16_nxv1i64 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i64>
%nxv1f32_nxv1i64 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i64>
%nxv1f64_nxv1i64 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i64>
- %nxv1f16_nxv1i1 = fptoui <vscale x 1 x half> undef to <vscale x 1 x i1>
%nxv1f32_nxv1i1 = fptoui <vscale x 1 x float> undef to <vscale x 1 x i1>
%nxv1f64_nxv1i1 = fptoui <vscale x 1 x double> undef to <vscale x 1 x i1>
- %nxv2f16_nxv2i8 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i8>
%nxv2f32_nxv2i8 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i8>
%nxv2f64_nxv2i8 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i8>
- %nxv2f16_nxv2i16 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i16>
%nxv2f32_nxv2i16 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i16>
%nxv2f64_nxv2i16 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i16>
- %nxv2f16_nxv2i32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
%nxv2f32_nxv2i32 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i32>
%nxv2f64_nxv2i32 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i32>
- %nxv2f16_nxv2i64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
%nxv2f32_nxv2i64 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i64>
%nxv2f64_nxv2i64 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i64>
- %nxv2f16_nxv2i1 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i1>
%nxv2f32_nxv2i1 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i1>
%nxv2f64_nxv2i1 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i1>
- %nxv4f16_nxv4i8 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
%nxv4f32_nxv4i8 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i8>
%nxv4f64_nxv4i8 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i8>
- %nxv4f16_nxv4i16 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i16>
%nxv4f32_nxv4i16 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i16>
%nxv4f64_nxv4i16 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i16>
- %nxv4f16_nxv4i32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
%nxv4f32_nxv4i32 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i32>
%nxv4f64_nxv4i32 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i32>
- %nxv4f16_nxv4i64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
%nxv4f32_nxv4i64 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i64>
%nxv4f64_nxv4i64 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i64>
- %nxv4f16_nxv4i1 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i1>
%nxv4f32_nxv4i1 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i1>
%nxv4f64_nxv4i1 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i1>
- %nxv8f16_nxv8i8 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
%nxv8f32_nxv8i8 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i8>
%nxv8f64_nxv8i8 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i8>
- %nxv8f16_nxv8i16 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i16>
%nxv8f32_nxv8i16 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i16>
%nxv8f64_nxv8i16 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i16>
- %nxv8f16_nxv8i32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
%nxv8f32_nxv8i32 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i32>
%nxv8f64_nxv8i32 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i32>
- %nxv8f16_nxv8i64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
%nxv8f32_nxv8i64 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i64>
%nxv8f64_nxv8i64 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i64>
- %nxv8f16_nxv8i1 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i1>
%nxv8f32_nxv8i1 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i1>
%nxv8f64_nxv8i1 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i1>
- %nxv16f16_nxv16i8 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i8>
%nxv16f32_nxv16i8 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i8>
%nxv16f64_nxv16i8 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i8>
- %nxv16f16_nxv16i16 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i16>
%nxv16f32_nxv16i16 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i16>
%nxv16f64_nxv16i16 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i16>
- %nxv16f16_nxv16i32 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i32>
%nxv16f32_nxv16i32 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i32>
%nxv16f64_nxv16i32 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i32>
- %nxv16f16_nxv16i64 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i64>
%nxv16f32_nxv16i64 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i64>
%nxv16f64_nxv16i64 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i64>
- %nxv16f16_nxv16i1 = fptoui <vscale x 16 x half> undef to <vscale x 16 x i1>
%nxv16f32_nxv16i1 = fptoui <vscale x 16 x float> undef to <vscale x 16 x i1>
%nxv16f64_nxv16i1 = fptoui <vscale x 16 x double> undef to <vscale x 16 x i1>
- %nxv32f16_nxv32i8 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i8>
%nxv32f32_nxv32i8 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i8>
%nxv32f64_nxv32i8 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i8>
- %nxv32f16_nxv32i16 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i16>
%nxv32f32_nxv32i16 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i16>
%nxv32f64_nxv32i16 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i16>
- %nxv32f16_nxv32i32 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i32>
%nxv32f32_nxv32i32 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i32>
%nxv32f64_nxv32i32 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i32>
- %nxv32f16_nxv32i64 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i64>
%nxv32f32_nxv32i64 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i64>
%nxv32f64_nxv32i64 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i64>
- %nxv32f16_nxv32i1 = fptoui <vscale x 32 x half> undef to <vscale x 32 x i1>
%nxv32f32_nxv32i1 = fptoui <vscale x 32 x float> undef to <vscale x 32 x i1>
%nxv32f64_nxv32i1 = fptoui <vscale x 32 x double> undef to <vscale x 32 x i1>
- %nxv64f16_nxv64i8 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i8>
%nxv64f32_nxv64i8 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i8>
%nxv64f64_nxv64i8 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i8>
- %nxv64f16_nxv64i16 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i16>
%nxv64f32_nxv64i16 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i16>
%nxv64f64_nxv64i16 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i16>
- %nxv64f16_nxv64i32 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i32>
%nxv64f32_nxv64i32 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i32>
%nxv64f64_nxv64i32 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i32>
- %nxv64f16_nxv64i64 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i64>
%nxv64f32_nxv64i64 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i64>
%nxv64f64_nxv64i64 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i64>
- %nxv64f16_nxv64i1 = fptoui <vscale x 64 x half> undef to <vscale x 64 x i1>
%nxv64f32_nxv64i1 = fptoui <vscale x 64 x float> undef to <vscale x 64 x i1>
%nxv64f64_nxv64i1 = fptoui <vscale x 64 x double> undef to <vscale x 64 x i1>
@@ -3009,652 +2589,442 @@ define void @fptoui() {
define void @sitofp() {
; RV32-LABEL: 'sitofp'
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2f16 = sitofp <2 x i8> undef to <2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f32 = sitofp <2 x i8> undef to <2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f64 = sitofp <2 x i8> undef to <2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f16 = sitofp <2 x i16> undef to <2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f32 = sitofp <2 x i16> undef to <2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16_v2f64 = sitofp <2 x i16> undef to <2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f16 = sitofp <2 x i32> undef to <2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f32 = sitofp <2 x i32> undef to <2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f64 = sitofp <2 x i32> undef to <2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = sitofp <2 x i64> undef to <2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i64_v2f32 = sitofp <2 x i64> undef to <2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f64 = sitofp <2 x i16> undef to <2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f16 = sitofp <2 x i1> undef to <2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f32 = sitofp <2 x i1> undef to <2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f64 = sitofp <2 x i1> undef to <2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f32 = sitofp <4 x i8> undef to <4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i8_v4f64 = sitofp <4 x i8> undef to <4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f32 = sitofp <4 x i16> undef to <4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i16_v4f64 = sitofp <4 x i16> undef to <4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f32 = sitofp <4 x i32> undef to <4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i32_v4f64 = sitofp <4 x i32> undef to <4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_v4f32 = sitofp <4 x i64> undef to <4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f64 = sitofp <4 x i16> undef to <4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f32 = sitofp <4 x i1> undef to <4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i1_v4f64 = sitofp <4 x i1> undef to <4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i8_v8f32 = sitofp <8 x i8> undef to <8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i8_v8f64 = sitofp <8 x i8> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f32 = sitofp <8 x i16> undef to <8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i16_v8f64 = sitofp <8 x i16> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i32_v8f32 = sitofp <8 x i32> undef to <8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i32_v8f64 = sitofp <8 x i32> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f32 = sitofp <8 x i64> undef to <8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i64_v8f64 = sitofp <8 x i16> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i1_v8f32 = sitofp <8 x i1> undef to <8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i1_v8f64 = sitofp <8 x i1> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i8_v16f32 = sitofp <16 x i8> undef to <16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i8_v16f64 = sitofp <16 x i8> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i16_v16f32 = sitofp <16 x i16> undef to <16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i16_v16f64 = sitofp <16 x i16> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i32_v16f32 = sitofp <16 x i32> undef to <16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i32_v16f64 = sitofp <16 x i32> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i64_v16f32 = sitofp <16 x i64> undef to <16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i64_v16f64 = sitofp <16 x i16> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i1_v16f32 = sitofp <16 x i1> undef to <16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16i1_v16f64 = sitofp <16 x i1> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32i8_v32f32 = sitofp <32 x i8> undef to <32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i8_v32f64 = sitofp <32 x i8> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i16_v32f32 = sitofp <32 x i16> undef to <32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i16_v32f64 = sitofp <32 x i16> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i32_v32f32 = sitofp <32 x i32> undef to <32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32i32_v32f64 = sitofp <32 x i32> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32i64_v32f32 = sitofp <32 x i64> undef to <32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i64_v32f64 = sitofp <32 x i16> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v32i1_v32f32 = sitofp <32 x i1> undef to <32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i1_v32f64 = sitofp <32 x i1> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64i8_v64f32 = sitofp <64 x i8> undef to <64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i8_v64f64 = sitofp <64 x i8> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64i16_v64f32 = sitofp <64 x i16> undef to <64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i16_v64f64 = sitofp <64 x i16> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i32_v64f32 = sitofp <64 x i32> undef to <64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64i32_v64f64 = sitofp <64 x i32> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64i64_v64f32 = sitofp <64 x i64> undef to <64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i64_v64f64 = sitofp <64 x i16> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v64i1_v64f32 = sitofp <64 x i1> undef to <64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64i1_v64f64 = sitofp <64 x i1> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128i8_v128f32 = sitofp <128 x i8> undef to <128 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128i8_v128f64 = sitofp <128 x i8> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128i16_v128f32 = sitofp <128 x i16> undef to <128 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i16_v128f64 = sitofp <128 x i16> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v128i32_v128f32 = sitofp <128 x i32> undef to <128 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128i32_v128f64 = sitofp <128 x i32> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128i64_v128f32 = sitofp <128 x i64> undef to <128 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i64_v128f64 = sitofp <128 x i16> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v128i1_v128f32 = sitofp <128 x i1> undef to <128 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %v128i1_v128f64 = sitofp <128 x i1> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f32 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f64 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f16 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f32 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i16_nxv1f64 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f16 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f32 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f64 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = sitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i64_nxv1f32 = sitofp <vscale x 1 x i64> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f64 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f16 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f32 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f64 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f32 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i8_nxv2f64 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f32 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i16_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f32 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i32_nxv2f64 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f16 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_nxv2f32 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f32 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i1_nxv2f64 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i8_nxv4f32 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i8_nxv4f64 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f32 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i16_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i32_nxv4f32 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i32_nxv4f64 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f32 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i64_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i1_nxv4f32 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4i1_nxv4f64 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i8_nxv8f32 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i8_nxv8f64 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i16_nxv8f32 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i16_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i32_nxv8f32 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i32_nxv8f64 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i64_nxv8f32 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i64_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i1_nxv8f32 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8i1_nxv8f64 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16i8_nxv16f32 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i8_nxv16f64 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i16_nxv16f32 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i16_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i32_nxv16f32 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16i32_nxv16f64 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16i64_nxv16f32 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i64_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv16i1_nxv16f32 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i1_nxv16f64 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32i8_nxv32f32 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i8_nxv32f64 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32i16_nxv32f32 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i16_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32i32_nxv32f32 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32i32_nxv32f64 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32i64_nxv32f32 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i64_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv32i1_nxv32f32 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32i1_nxv32f64 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64i8_nxv64f32 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64i8_nxv64f64 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64i16_nxv64f32 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i16_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64i32_nxv64f32 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64i32_nxv64f64 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 37 for instruction: %nxv64i64_nxv64f32 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i64_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv64i1_nxv64f32 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64i1_nxv64f64 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; RV64-LABEL: 'sitofp'
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2f16 = sitofp <2 x i8> undef to <2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f32 = sitofp <2 x i8> undef to <2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f64 = sitofp <2 x i8> undef to <2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f16 = sitofp <2 x i16> undef to <2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f32 = sitofp <2 x i16> undef to <2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16_v2f64 = sitofp <2 x i16> undef to <2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f16 = sitofp <2 x i32> undef to <2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f32 = sitofp <2 x i32> undef to <2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f64 = sitofp <2 x i32> undef to <2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = sitofp <2 x i64> undef to <2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i64_v2f32 = sitofp <2 x i64> undef to <2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f64 = sitofp <2 x i16> undef to <2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f16 = sitofp <2 x i1> undef to <2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f32 = sitofp <2 x i1> undef to <2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f64 = sitofp <2 x i1> undef to <2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f32 = sitofp <4 x i8> undef to <4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i8_v4f64 = sitofp <4 x i8> undef to <4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f32 = sitofp <4 x i16> undef to <4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i16_v4f64 = sitofp <4 x i16> undef to <4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f32 = sitofp <4 x i32> undef to <4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i32_v4f64 = sitofp <4 x i32> undef to <4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_v4f32 = sitofp <4 x i64> undef to <4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f64 = sitofp <4 x i16> undef to <4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f32 = sitofp <4 x i1> undef to <4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i1_v4f64 = sitofp <4 x i1> undef to <4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i8_v8f32 = sitofp <8 x i8> undef to <8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i8_v8f64 = sitofp <8 x i8> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f32 = sitofp <8 x i16> undef to <8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i16_v8f64 = sitofp <8 x i16> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i32_v8f32 = sitofp <8 x i32> undef to <8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i32_v8f64 = sitofp <8 x i32> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f32 = sitofp <8 x i64> undef to <8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i64_v8f64 = sitofp <8 x i16> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i1_v8f32 = sitofp <8 x i1> undef to <8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i1_v8f64 = sitofp <8 x i1> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i8_v16f32 = sitofp <16 x i8> undef to <16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i8_v16f64 = sitofp <16 x i8> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i16_v16f32 = sitofp <16 x i16> undef to <16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i16_v16f64 = sitofp <16 x i16> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i32_v16f32 = sitofp <16 x i32> undef to <16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i32_v16f64 = sitofp <16 x i32> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i64_v16f32 = sitofp <16 x i64> undef to <16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i64_v16f64 = sitofp <16 x i16> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i1_v16f32 = sitofp <16 x i1> undef to <16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16i1_v16f64 = sitofp <16 x i1> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32i8_v32f32 = sitofp <32 x i8> undef to <32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i8_v32f64 = sitofp <32 x i8> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i16_v32f32 = sitofp <32 x i16> undef to <32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i16_v32f64 = sitofp <32 x i16> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i32_v32f32 = sitofp <32 x i32> undef to <32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32i32_v32f64 = sitofp <32 x i32> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32i64_v32f32 = sitofp <32 x i64> undef to <32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i64_v32f64 = sitofp <32 x i16> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v32i1_v32f32 = sitofp <32 x i1> undef to <32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i1_v32f64 = sitofp <32 x i1> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64i8_v64f32 = sitofp <64 x i8> undef to <64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i8_v64f64 = sitofp <64 x i8> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64i16_v64f32 = sitofp <64 x i16> undef to <64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i16_v64f64 = sitofp <64 x i16> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i32_v64f32 = sitofp <64 x i32> undef to <64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64i32_v64f64 = sitofp <64 x i32> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64i64_v64f32 = sitofp <64 x i64> undef to <64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i64_v64f64 = sitofp <64 x i16> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v64i1_v64f32 = sitofp <64 x i1> undef to <64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64i1_v64f64 = sitofp <64 x i1> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128i8_v128f32 = sitofp <128 x i8> undef to <128 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128i8_v128f64 = sitofp <128 x i8> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128i16_v128f32 = sitofp <128 x i16> undef to <128 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i16_v128f64 = sitofp <128 x i16> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v128i32_v128f32 = sitofp <128 x i32> undef to <128 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128i32_v128f64 = sitofp <128 x i32> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128i64_v128f32 = sitofp <128 x i64> undef to <128 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i64_v128f64 = sitofp <128 x i16> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v128i1_v128f32 = sitofp <128 x i1> undef to <128 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %v128i1_v128f64 = sitofp <128 x i1> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f32 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f64 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f16 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f32 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i16_nxv1f64 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f16 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f32 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f64 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = sitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i64_nxv1f32 = sitofp <vscale x 1 x i64> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f64 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f16 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f32 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f64 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f32 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i8_nxv2f64 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f32 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i16_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f32 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i32_nxv2f64 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f16 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_nxv2f32 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f32 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i1_nxv2f64 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i8_nxv4f32 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i8_nxv4f64 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f32 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i16_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i32_nxv4f32 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i32_nxv4f64 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f32 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i64_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i1_nxv4f32 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4i1_nxv4f64 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i8_nxv8f32 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i8_nxv8f64 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i16_nxv8f32 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i16_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i32_nxv8f32 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i32_nxv8f64 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i64_nxv8f32 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i64_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i1_nxv8f32 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8i1_nxv8f64 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16i8_nxv16f32 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i8_nxv16f64 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i16_nxv16f32 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i16_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i32_nxv16f32 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16i32_nxv16f64 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16i64_nxv16f32 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i64_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv16i1_nxv16f32 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i1_nxv16f64 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32i8_nxv32f32 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i8_nxv32f64 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32i16_nxv32f32 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i16_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32i32_nxv32f32 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32i32_nxv32f64 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32i64_nxv32f32 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i64_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv32i1_nxv32f32 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32i1_nxv32f64 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64i8_nxv64f32 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64i8_nxv64f64 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64i16_nxv64f32 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i16_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64i32_nxv64f32 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64i32_nxv64f64 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64i64_nxv64f32 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i64_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv64i1_nxv64f32 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64i1_nxv64f64 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
- %v2i8_v2f16 = sitofp <2 x i8> undef to <2 x half>
%v2i8_v2f32 = sitofp <2 x i8> undef to <2 x float>
%v2i8_v2f64 = sitofp <2 x i8> undef to <2 x double>
- %v2i16_v2f16 = sitofp <2 x i16> undef to <2 x half>
%v2i16_v2f32 = sitofp <2 x i16> undef to <2 x float>
%v2i16_v2f64 = sitofp <2 x i16> undef to <2 x double>
- %v2i32_v2f16 = sitofp <2 x i32> undef to <2 x half>
%v2i32_v2f32 = sitofp <2 x i32> undef to <2 x float>
%v2i32_v2f64 = sitofp <2 x i32> undef to <2 x double>
- %v2i64_v2f16 = sitofp <2 x i64> undef to <2 x half>
%v2i64_v2f32 = sitofp <2 x i64> undef to <2 x float>
%v2i64_v2f64 = sitofp <2 x i16> undef to <2 x double>
- %v2i1_v2f16 = sitofp <2 x i1> undef to <2 x half>
%v2i1_v2f32 = sitofp <2 x i1> undef to <2 x float>
%v2i1_v2f64 = sitofp <2 x i1> undef to <2 x double>
- %v4i8_v4f16 = sitofp <4 x i8> undef to <4 x half>
%v4i8_v4f32 = sitofp <4 x i8> undef to <4 x float>
%v4i8_v4f64 = sitofp <4 x i8> undef to <4 x double>
- %v4i16_v4f16 = sitofp <4 x i16> undef to <4 x half>
%v4i16_v4f32 = sitofp <4 x i16> undef to <4 x float>
%v4i16_v4f64 = sitofp <4 x i16> undef to <4 x double>
- %v4i32_v4f16 = sitofp <4 x i32> undef to <4 x half>
%v4i32_v4f32 = sitofp <4 x i32> undef to <4 x float>
%v4i32_v4f64 = sitofp <4 x i32> undef to <4 x double>
- %v4i64_v4f16 = sitofp <4 x i64> undef to <4 x half>
%v4i64_v4f32 = sitofp <4 x i64> undef to <4 x float>
%v4i64_v4f64 = sitofp <4 x i16> undef to <4 x double>
- %v4i1_v4f16 = sitofp <4 x i1> undef to <4 x half>
%v4i1_v4f32 = sitofp <4 x i1> undef to <4 x float>
%v4i1_v4f64 = sitofp <4 x i1> undef to <4 x double>
- %v8i8_v8f16 = sitofp <8 x i8> undef to <8 x half>
%v8i8_v8f32 = sitofp <8 x i8> undef to <8 x float>
%v8i8_v8f64 = sitofp <8 x i8> undef to <8 x double>
- %v8i16_v8f16 = sitofp <8 x i16> undef to <8 x half>
%v8i16_v8f32 = sitofp <8 x i16> undef to <8 x float>
%v8i16_v8f64 = sitofp <8 x i16> undef to <8 x double>
- %v8i32_v8f16 = sitofp <8 x i32> undef to <8 x half>
%v8i32_v8f32 = sitofp <8 x i32> undef to <8 x float>
%v8i32_v8f64 = sitofp <8 x i32> undef to <8 x double>
- %v8i64_v8f16 = sitofp <8 x i64> undef to <8 x half>
%v8i64_v8f32 = sitofp <8 x i64> undef to <8 x float>
%v8i64_v8f64 = sitofp <8 x i16> undef to <8 x double>
- %v8i1_v8f16 = sitofp <8 x i1> undef to <8 x half>
%v8i1_v8f32 = sitofp <8 x i1> undef to <8 x float>
%v8i1_v8f64 = sitofp <8 x i1> undef to <8 x double>
- %v16i8_v16f16 = sitofp <16 x i8> undef to <16 x half>
%v16i8_v16f32 = sitofp <16 x i8> undef to <16 x float>
%v16i8_v16f64 = sitofp <16 x i8> undef to <16 x double>
- %v16i16_v16f16 = sitofp <16 x i16> undef to <16 x half>
%v16i16_v16f32 = sitofp <16 x i16> undef to <16 x float>
%v16i16_v16f64 = sitofp <16 x i16> undef to <16 x double>
- %v16i32_v16f16 = sitofp <16 x i32> undef to <16 x half>
%v16i32_v16f32 = sitofp <16 x i32> undef to <16 x float>
%v16i32_v16f64 = sitofp <16 x i32> undef to <16 x double>
- %v16i64_v16f16 = sitofp <16 x i64> undef to <16 x half>
%v16i64_v16f32 = sitofp <16 x i64> undef to <16 x float>
%v16i64_v16f64 = sitofp <16 x i16> undef to <16 x double>
- %v16i1_v16f16 = sitofp <16 x i1> undef to <16 x half>
%v16i1_v16f32 = sitofp <16 x i1> undef to <16 x float>
%v16i1_v16f64 = sitofp <16 x i1> undef to <16 x double>
- %v32i8_v32f16 = sitofp <32 x i8> undef to <32 x half>
%v32i8_v32f32 = sitofp <32 x i8> undef to <32 x float>
%v32i8_v32f64 = sitofp <32 x i8> undef to <32 x double>
- %v32i16_v32f16 = sitofp <32 x i16> undef to <32 x half>
%v32i16_v32f32 = sitofp <32 x i16> undef to <32 x float>
%v32i16_v32f64 = sitofp <32 x i16> undef to <32 x double>
- %v32i32_v32f16 = sitofp <32 x i32> undef to <32 x half>
%v32i32_v32f32 = sitofp <32 x i32> undef to <32 x float>
%v32i32_v32f64 = sitofp <32 x i32> undef to <32 x double>
- %v32i64_v32f16 = sitofp <32 x i64> undef to <32 x half>
%v32i64_v32f32 = sitofp <32 x i64> undef to <32 x float>
%v32i64_v32f64 = sitofp <32 x i16> undef to <32 x double>
- %v32i1_v32f16 = sitofp <32 x i1> undef to <32 x half>
%v32i1_v32f32 = sitofp <32 x i1> undef to <32 x float>
%v32i1_v32f64 = sitofp <32 x i1> undef to <32 x double>
- %v64i8_v64f16 = sitofp <64 x i8> undef to <64 x half>
%v64i8_v64f32 = sitofp <64 x i8> undef to <64 x float>
%v64i8_v64f64 = sitofp <64 x i8> undef to <64 x double>
- %v64i16_v64f16 = sitofp <64 x i16> undef to <64 x half>
%v64i16_v64f32 = sitofp <64 x i16> undef to <64 x float>
%v64i16_v64f64 = sitofp <64 x i16> undef to <64 x double>
- %v64i32_v64f16 = sitofp <64 x i32> undef to <64 x half>
%v64i32_v64f32 = sitofp <64 x i32> undef to <64 x float>
%v64i32_v64f64 = sitofp <64 x i32> undef to <64 x double>
- %v64i64_v64f16 = sitofp <64 x i64> undef to <64 x half>
%v64i64_v64f32 = sitofp <64 x i64> undef to <64 x float>
%v64i64_v64f64 = sitofp <64 x i16> undef to <64 x double>
- %v64i1_v64f16 = sitofp <64 x i1> undef to <64 x half>
%v64i1_v64f32 = sitofp <64 x i1> undef to <64 x float>
%v64i1_v64f64 = sitofp <64 x i1> undef to <64 x double>
- %v128i8_v128f16 = sitofp <128 x i8> undef to <128 x half>
%v128i8_v128f32 = sitofp <128 x i8> undef to <128 x float>
%v128i8_v128f64 = sitofp <128 x i8> undef to <128 x double>
- %v128i16_v128f16 = sitofp <128 x i16> undef to <128 x half>
%v128i16_v128f32 = sitofp <128 x i16> undef to <128 x float>
%v128i16_v128f64 = sitofp <128 x i16> undef to <128 x double>
- %v128i32_v128f16 = sitofp <128 x i32> undef to <128 x half>
%v128i32_v128f32 = sitofp <128 x i32> undef to <128 x float>
%v128i32_v128f64 = sitofp <128 x i32> undef to <128 x double>
- %v128i64_v128f16 = sitofp <128 x i64> undef to <128 x half>
%v128i64_v128f32 = sitofp <128 x i64> undef to <128 x float>
%v128i64_v128f64 = sitofp <128 x i16> undef to <128 x double>
- %v128i1_v128f16 = sitofp <128 x i1> undef to <128 x half>
%v128i1_v128f32 = sitofp <128 x i1> undef to <128 x float>
%v128i1_v128f64 = sitofp <128 x i1> undef to <128 x double>
- %nxv1i8_nxv1f16 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
%nxv1i8_nxv1f32 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x float>
%nxv1i8_nxv1f64 = sitofp <vscale x 1 x i8> undef to <vscale x 1 x double>
- %nxv1i16_nxv1f16 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
%nxv1i16_nxv1f32 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x float>
%nxv1i16_nxv1f64 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
- %nxv1i32_nxv1f16 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
%nxv1i32_nxv1f32 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x float>
%nxv1i32_nxv1f64 = sitofp <vscale x 1 x i32> undef to <vscale x 1 x double>
- %nxv1i64_nxv1f16 = sitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
%nxv1i64_nxv1f32 = sitofp <vscale x 1 x i64> undef to <vscale x 1 x float>
%nxv1i64_nxv1f64 = sitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
- %nxv1i1_nxv1f16 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
%nxv1i1_nxv1f32 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x float>
%nxv1i1_nxv1f64 = sitofp <vscale x 1 x i1> undef to <vscale x 1 x double>
- %nxv2i8_nxv2f16 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
%nxv2i8_nxv2f32 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x float>
%nxv2i8_nxv2f64 = sitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
- %nxv2i16_nxv2f16 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
%nxv2i16_nxv2f32 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x float>
%nxv2i16_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
- %nxv2i32_nxv2f16 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
%nxv2i32_nxv2f32 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x float>
%nxv2i32_nxv2f64 = sitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
- %nxv2i64_nxv2f16 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
%nxv2i64_nxv2f32 = sitofp <vscale x 2 x i64> undef to <vscale x 2 x float>
%nxv2i64_nxv2f64 = sitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
- %nxv2i1_nxv2f16 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
%nxv2i1_nxv2f32 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x float>
%nxv2i1_nxv2f64 = sitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
- %nxv4i8_nxv4f16 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
%nxv4i8_nxv4f32 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
%nxv4i8_nxv4f64 = sitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
- %nxv4i16_nxv4f16 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
%nxv4i16_nxv4f32 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
%nxv4i16_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
- %nxv4i32_nxv4f16 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
%nxv4i32_nxv4f32 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
%nxv4i32_nxv4f64 = sitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
- %nxv4i64_nxv4f16 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
%nxv4i64_nxv4f32 = sitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
%nxv4i64_nxv4f64 = sitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
- %nxv4i1_nxv4f16 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
%nxv4i1_nxv4f32 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
%nxv4i1_nxv4f64 = sitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
- %nxv8i8_nxv8f16 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
%nxv8i8_nxv8f32 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
%nxv8i8_nxv8f64 = sitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
- %nxv8i16_nxv8f16 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
%nxv8i16_nxv8f32 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
%nxv8i16_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
- %nxv8i32_nxv8f16 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
%nxv8i32_nxv8f32 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
%nxv8i32_nxv8f64 = sitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
- %nxv8i64_nxv8f16 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
%nxv8i64_nxv8f32 = sitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
%nxv8i64_nxv8f64 = sitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
- %nxv8i1_nxv8f16 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
%nxv8i1_nxv8f32 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
%nxv8i1_nxv8f64 = sitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
- %nxv16i8_nxv16f16 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
%nxv16i8_nxv16f32 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
%nxv16i8_nxv16f64 = sitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
- %nxv16i16_nxv16f16 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
%nxv16i16_nxv16f32 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
%nxv16i16_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
- %nxv16i32_nxv16f16 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
%nxv16i32_nxv16f32 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
%nxv16i32_nxv16f64 = sitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
- %nxv16i64_nxv16f16 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
%nxv16i64_nxv16f32 = sitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
%nxv16i64_nxv16f64 = sitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
- %nxv16i1_nxv16f16 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
%nxv16i1_nxv16f32 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
%nxv16i1_nxv16f64 = sitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
- %nxv32i8_nxv32f16 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
%nxv32i8_nxv32f32 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
%nxv32i8_nxv32f64 = sitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
- %nxv32i16_nxv32f16 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
%nxv32i16_nxv32f32 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
%nxv32i16_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
- %nxv32i32_nxv32f16 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
%nxv32i32_nxv32f32 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x float>
%nxv32i32_nxv32f64 = sitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
- %nxv32i64_nxv32f16 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
%nxv32i64_nxv32f32 = sitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
%nxv32i64_nxv32f64 = sitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
- %nxv32i1_nxv32f16 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
%nxv32i1_nxv32f32 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
%nxv32i1_nxv32f64 = sitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
- %nxv64i8_nxv64f16 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
%nxv64i8_nxv64f32 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
%nxv64i8_nxv64f64 = sitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
- %nxv64i16_nxv64f16 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
%nxv64i16_nxv64f32 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
%nxv64i16_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
- %nxv64i32_nxv64f16 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
%nxv64i32_nxv64f32 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x float>
%nxv64i32_nxv64f64 = sitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
- %nxv64i64_nxv64f16 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
%nxv64i64_nxv64f32 = sitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
%nxv64i64_nxv64f64 = sitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
- %nxv64i1_nxv64f16 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
%nxv64i1_nxv64f32 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
%nxv64i1_nxv64f64 = sitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
@@ -3663,652 +3033,442 @@ define void @sitofp() {
define void @uitofp() {
; RV32-LABEL: 'uitofp'
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2f16 = uitofp <2 x i8> undef to <2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f32 = uitofp <2 x i8> undef to <2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f64 = uitofp <2 x i8> undef to <2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f16 = uitofp <2 x i16> undef to <2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f32 = uitofp <2 x i16> undef to <2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16_v2f64 = uitofp <2 x i16> undef to <2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f16 = uitofp <2 x i32> undef to <2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f32 = uitofp <2 x i32> undef to <2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f64 = uitofp <2 x i32> undef to <2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = uitofp <2 x i64> undef to <2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i64_v2f32 = uitofp <2 x i64> undef to <2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f64 = uitofp <2 x i16> undef to <2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f16 = uitofp <2 x i1> undef to <2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f32 = uitofp <2 x i1> undef to <2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f64 = uitofp <2 x i1> undef to <2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f32 = uitofp <4 x i8> undef to <4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i8_v4f64 = uitofp <4 x i8> undef to <4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f32 = uitofp <4 x i16> undef to <4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i16_v4f64 = uitofp <4 x i16> undef to <4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f32 = uitofp <4 x i32> undef to <4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i32_v4f64 = uitofp <4 x i32> undef to <4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_v4f32 = uitofp <4 x i64> undef to <4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f64 = uitofp <4 x i16> undef to <4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f32 = uitofp <4 x i1> undef to <4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i1_v4f64 = uitofp <4 x i1> undef to <4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i8_v8f32 = uitofp <8 x i8> undef to <8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i8_v8f64 = uitofp <8 x i8> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f32 = uitofp <8 x i16> undef to <8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i16_v8f64 = uitofp <8 x i16> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i32_v8f32 = uitofp <8 x i32> undef to <8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i32_v8f64 = uitofp <8 x i32> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f32 = uitofp <8 x i64> undef to <8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i64_v8f64 = uitofp <8 x i16> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i1_v8f32 = uitofp <8 x i1> undef to <8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i1_v8f64 = uitofp <8 x i1> undef to <8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i8_v16f32 = uitofp <16 x i8> undef to <16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i8_v16f64 = uitofp <16 x i8> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i16_v16f32 = uitofp <16 x i16> undef to <16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i16_v16f64 = uitofp <16 x i16> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i32_v16f32 = uitofp <16 x i32> undef to <16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i32_v16f64 = uitofp <16 x i32> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i64_v16f32 = uitofp <16 x i64> undef to <16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i64_v16f64 = uitofp <16 x i16> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i1_v16f32 = uitofp <16 x i1> undef to <16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16i1_v16f64 = uitofp <16 x i1> undef to <16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32i8_v32f32 = uitofp <32 x i8> undef to <32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i8_v32f64 = uitofp <32 x i8> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i16_v32f32 = uitofp <32 x i16> undef to <32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i16_v32f64 = uitofp <32 x i16> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i32_v32f32 = uitofp <32 x i32> undef to <32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32i32_v32f64 = uitofp <32 x i32> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32i64_v32f32 = uitofp <32 x i64> undef to <32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i64_v32f64 = uitofp <32 x i16> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v32i1_v32f32 = uitofp <32 x i1> undef to <32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i1_v32f64 = uitofp <32 x i1> undef to <32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64i8_v64f32 = uitofp <64 x i8> undef to <64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i8_v64f64 = uitofp <64 x i8> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64i16_v64f32 = uitofp <64 x i16> undef to <64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i16_v64f64 = uitofp <64 x i16> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i32_v64f32 = uitofp <64 x i32> undef to <64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64i32_v64f64 = uitofp <64 x i32> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64i64_v64f32 = uitofp <64 x i64> undef to <64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i64_v64f64 = uitofp <64 x i16> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v64i1_v64f32 = uitofp <64 x i1> undef to <64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64i1_v64f64 = uitofp <64 x i1> undef to <64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128i8_v128f32 = uitofp <128 x i8> undef to <128 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128i8_v128f64 = uitofp <128 x i8> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128i16_v128f32 = uitofp <128 x i16> undef to <128 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i16_v128f64 = uitofp <128 x i16> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v128i32_v128f32 = uitofp <128 x i32> undef to <128 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128i32_v128f64 = uitofp <128 x i32> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128i64_v128f32 = uitofp <128 x i64> undef to <128 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i64_v128f64 = uitofp <128 x i16> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v128i1_v128f32 = uitofp <128 x i1> undef to <128 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %v128i1_v128f64 = uitofp <128 x i1> undef to <128 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f32 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f64 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f16 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f32 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i16_nxv1f64 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f16 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f32 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f64 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = uitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i64_nxv1f32 = uitofp <vscale x 1 x i64> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f64 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f16 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f32 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f64 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f32 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i8_nxv2f64 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f32 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i16_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f32 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i32_nxv2f64 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f16 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_nxv2f32 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f32 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i1_nxv2f64 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i8_nxv4f32 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i8_nxv4f64 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f32 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i16_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i32_nxv4f32 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i32_nxv4f64 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f32 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i64_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i1_nxv4f32 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4i1_nxv4f64 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i8_nxv8f32 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i8_nxv8f64 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i16_nxv8f32 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i16_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i32_nxv8f32 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i32_nxv8f64 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i64_nxv8f32 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i64_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i1_nxv8f32 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8i1_nxv8f64 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16i8_nxv16f32 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i8_nxv16f64 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i16_nxv16f32 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i16_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i32_nxv16f32 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16i32_nxv16f64 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16i64_nxv16f32 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i64_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv16i1_nxv16f32 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i1_nxv16f64 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32i8_nxv32f32 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i8_nxv32f64 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32i16_nxv32f32 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i16_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32i32_nxv32f32 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32i32_nxv32f64 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32i64_nxv32f32 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i64_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv32i1_nxv32f32 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32i1_nxv32f64 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64i8_nxv64f32 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64i8_nxv64f64 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64i16_nxv64f32 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i16_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64i32_nxv64f32 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64i32_nxv64f64 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 37 for instruction: %nxv64i64_nxv64f32 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i64_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
; RV32-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv64i1_nxv64f32 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
; RV32-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64i1_nxv64f64 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
; RV32-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; RV64-LABEL: 'uitofp'
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_v2f16 = uitofp <2 x i8> undef to <2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f32 = uitofp <2 x i8> undef to <2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8_v2f64 = uitofp <2 x i8> undef to <2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f16 = uitofp <2 x i16> undef to <2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_v2f32 = uitofp <2 x i16> undef to <2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16_v2f64 = uitofp <2 x i16> undef to <2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f16 = uitofp <2 x i32> undef to <2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f32 = uitofp <2 x i32> undef to <2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_v2f64 = uitofp <2 x i32> undef to <2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f16 = uitofp <2 x i64> undef to <2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i64_v2f32 = uitofp <2 x i64> undef to <2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_v2f64 = uitofp <2 x i16> undef to <2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f16 = uitofp <2 x i1> undef to <2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f32 = uitofp <2 x i1> undef to <2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i1_v2f64 = uitofp <2 x i1> undef to <2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i8_v4f32 = uitofp <4 x i8> undef to <4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i8_v4f64 = uitofp <4 x i8> undef to <4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_v4f32 = uitofp <4 x i16> undef to <4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i16_v4f64 = uitofp <4 x i16> undef to <4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_v4f32 = uitofp <4 x i32> undef to <4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i32_v4f64 = uitofp <4 x i32> undef to <4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_v4f32 = uitofp <4 x i64> undef to <4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64_v4f64 = uitofp <4 x i16> undef to <4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i1_v4f32 = uitofp <4 x i1> undef to <4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i1_v4f64 = uitofp <4 x i1> undef to <4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i8_v8f32 = uitofp <8 x i8> undef to <8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i8_v8f64 = uitofp <8 x i8> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i16_v8f32 = uitofp <8 x i16> undef to <8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i16_v8f64 = uitofp <8 x i16> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i32_v8f32 = uitofp <8 x i32> undef to <8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i32_v8f64 = uitofp <8 x i32> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_v8f32 = uitofp <8 x i64> undef to <8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v8i64_v8f64 = uitofp <8 x i16> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i1_v8f32 = uitofp <8 x i1> undef to <8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i1_v8f64 = uitofp <8 x i1> undef to <8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i8_v16f32 = uitofp <16 x i8> undef to <16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i8_v16f64 = uitofp <16 x i8> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i16_v16f32 = uitofp <16 x i16> undef to <16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i16_v16f64 = uitofp <16 x i16> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i32_v16f32 = uitofp <16 x i32> undef to <16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i32_v16f64 = uitofp <16 x i32> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i64_v16f32 = uitofp <16 x i64> undef to <16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v16i64_v16f64 = uitofp <16 x i16> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v16i1_v16f32 = uitofp <16 x i1> undef to <16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v16i1_v16f64 = uitofp <16 x i1> undef to <16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v32i8_v32f32 = uitofp <32 x i8> undef to <32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i8_v32f64 = uitofp <32 x i8> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i16_v32f32 = uitofp <32 x i16> undef to <32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i16_v32f64 = uitofp <32 x i16> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i32_v32f32 = uitofp <32 x i32> undef to <32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v32i32_v32f64 = uitofp <32 x i32> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v32i64_v32f32 = uitofp <32 x i64> undef to <32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v32i64_v32f64 = uitofp <32 x i16> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v32i1_v32f32 = uitofp <32 x i1> undef to <32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v32i1_v32f64 = uitofp <32 x i1> undef to <32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %v64i8_v64f32 = uitofp <64 x i8> undef to <64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i8_v64f64 = uitofp <64 x i8> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v64i16_v64f32 = uitofp <64 x i16> undef to <64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i16_v64f64 = uitofp <64 x i16> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i32_v64f32 = uitofp <64 x i32> undef to <64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v64i32_v64f64 = uitofp <64 x i32> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v64i64_v64f32 = uitofp <64 x i64> undef to <64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v64i64_v64f64 = uitofp <64 x i16> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v64i1_v64f32 = uitofp <64 x i1> undef to <64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v64i1_v64f64 = uitofp <64 x i1> undef to <64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %v128i8_v128f32 = uitofp <128 x i8> undef to <128 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %v128i8_v128f64 = uitofp <128 x i8> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %v128i16_v128f32 = uitofp <128 x i16> undef to <128 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i16_v128f64 = uitofp <128 x i16> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v128i32_v128f32 = uitofp <128 x i32> undef to <128 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %v128i32_v128f64 = uitofp <128 x i32> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %v128i64_v128f32 = uitofp <128 x i64> undef to <128 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %v128i64_v128f64 = uitofp <128 x i16> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %v128i1_v128f32 = uitofp <128 x i1> undef to <128 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %v128i1_v128f64 = uitofp <128 x i1> undef to <128 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i8_nxv1f16 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f32 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i8_nxv1f64 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f16 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i16_nxv1f32 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i16_nxv1f64 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f16 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f32 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i32_nxv1f64 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f16 = uitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv1i64_nxv1f32 = uitofp <vscale x 1 x i64> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv1i64_nxv1f64 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f16 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f32 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv1i1_nxv1f64 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_nxv2f16 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i8_nxv2f32 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i8_nxv2f64 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f16 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_nxv2f32 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i16_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f16 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_nxv2f32 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i32_nxv2f64 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_nxv2f16 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_nxv2f32 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i64_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f16 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv2i1_nxv2f32 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv2i1_nxv2f64 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_nxv4f16 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i8_nxv4f32 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i8_nxv4f64 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_nxv4f16 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i16_nxv4f32 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i16_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_nxv4f16 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i32_nxv4f32 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i32_nxv4f64 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_nxv4f32 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv4i64_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %nxv4i1_nxv4f16 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv4i1_nxv4f32 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv4i1_nxv4f64 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i8_nxv8f32 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i8_nxv8f64 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i16_nxv8f32 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i16_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i32_nxv8f32 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i32_nxv8f64 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i64_nxv8f32 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv8i64_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv8i1_nxv8f32 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv8i1_nxv8f64 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %nxv16i8_nxv16f32 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i8_nxv16f64 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i16_nxv16f32 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i16_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i32_nxv16f32 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv16i32_nxv16f64 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv16i64_nxv16f32 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv16i64_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv16i1_nxv16f32 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv16i1_nxv16f64 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %nxv32i8_nxv32f32 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i8_nxv32f64 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv32i16_nxv32f32 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i16_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv32i32_nxv32f32 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv32i32_nxv32f64 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 27 for instruction: %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv32i64_nxv32f32 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv32i64_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv32i1_nxv32f32 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv32i1_nxv32f64 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 51 for instruction: %nxv64i8_nxv64f32 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 103 for instruction: %nxv64i8_nxv64f64 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv64i16_nxv64f16 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %nxv64i16_nxv64f32 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i16_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %nxv64i32_nxv64f32 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %nxv64i32_nxv64f64 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %nxv64i64_nxv64f32 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 102 for instruction: %nxv64i64_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
-; RV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
; RV64-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %nxv64i1_nxv64f32 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
; RV64-NEXT: Cost Model: Found an estimated cost of 135 for instruction: %nxv64i1_nxv64f64 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
; RV64-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
- %v2i8_v2f16 = uitofp <2 x i8> undef to <2 x half>
%v2i8_v2f32 = uitofp <2 x i8> undef to <2 x float>
%v2i8_v2f64 = uitofp <2 x i8> undef to <2 x double>
- %v2i16_v2f16 = uitofp <2 x i16> undef to <2 x half>
%v2i16_v2f32 = uitofp <2 x i16> undef to <2 x float>
%v2i16_v2f64 = uitofp <2 x i16> undef to <2 x double>
- %v2i32_v2f16 = uitofp <2 x i32> undef to <2 x half>
%v2i32_v2f32 = uitofp <2 x i32> undef to <2 x float>
%v2i32_v2f64 = uitofp <2 x i32> undef to <2 x double>
- %v2i64_v2f16 = uitofp <2 x i64> undef to <2 x half>
%v2i64_v2f32 = uitofp <2 x i64> undef to <2 x float>
%v2i64_v2f64 = uitofp <2 x i16> undef to <2 x double>
- %v2i1_v2f16 = uitofp <2 x i1> undef to <2 x half>
%v2i1_v2f32 = uitofp <2 x i1> undef to <2 x float>
%v2i1_v2f64 = uitofp <2 x i1> undef to <2 x double>
- %v4i8_v4f16 = uitofp <4 x i8> undef to <4 x half>
%v4i8_v4f32 = uitofp <4 x i8> undef to <4 x float>
%v4i8_v4f64 = uitofp <4 x i8> undef to <4 x double>
- %v4i16_v4f16 = uitofp <4 x i16> undef to <4 x half>
%v4i16_v4f32 = uitofp <4 x i16> undef to <4 x float>
%v4i16_v4f64 = uitofp <4 x i16> undef to <4 x double>
- %v4i32_v4f16 = uitofp <4 x i32> undef to <4 x half>
%v4i32_v4f32 = uitofp <4 x i32> undef to <4 x float>
%v4i32_v4f64 = uitofp <4 x i32> undef to <4 x double>
- %v4i64_v4f16 = uitofp <4 x i64> undef to <4 x half>
%v4i64_v4f32 = uitofp <4 x i64> undef to <4 x float>
%v4i64_v4f64 = uitofp <4 x i16> undef to <4 x double>
- %v4i1_v4f16 = uitofp <4 x i1> undef to <4 x half>
%v4i1_v4f32 = uitofp <4 x i1> undef to <4 x float>
%v4i1_v4f64 = uitofp <4 x i1> undef to <4 x double>
- %v8i8_v8f16 = uitofp <8 x i8> undef to <8 x half>
%v8i8_v8f32 = uitofp <8 x i8> undef to <8 x float>
%v8i8_v8f64 = uitofp <8 x i8> undef to <8 x double>
- %v8i16_v8f16 = uitofp <8 x i16> undef to <8 x half>
%v8i16_v8f32 = uitofp <8 x i16> undef to <8 x float>
%v8i16_v8f64 = uitofp <8 x i16> undef to <8 x double>
- %v8i32_v8f16 = uitofp <8 x i32> undef to <8 x half>
%v8i32_v8f32 = uitofp <8 x i32> undef to <8 x float>
%v8i32_v8f64 = uitofp <8 x i32> undef to <8 x double>
- %v8i64_v8f16 = uitofp <8 x i64> undef to <8 x half>
%v8i64_v8f32 = uitofp <8 x i64> undef to <8 x float>
%v8i64_v8f64 = uitofp <8 x i16> undef to <8 x double>
- %v8i1_v8f16 = uitofp <8 x i1> undef to <8 x half>
%v8i1_v8f32 = uitofp <8 x i1> undef to <8 x float>
%v8i1_v8f64 = uitofp <8 x i1> undef to <8 x double>
- %v16i8_v16f16 = uitofp <16 x i8> undef to <16 x half>
%v16i8_v16f32 = uitofp <16 x i8> undef to <16 x float>
%v16i8_v16f64 = uitofp <16 x i8> undef to <16 x double>
- %v16i16_v16f16 = uitofp <16 x i16> undef to <16 x half>
%v16i16_v16f32 = uitofp <16 x i16> undef to <16 x float>
%v16i16_v16f64 = uitofp <16 x i16> undef to <16 x double>
- %v16i32_v16f16 = uitofp <16 x i32> undef to <16 x half>
%v16i32_v16f32 = uitofp <16 x i32> undef to <16 x float>
%v16i32_v16f64 = uitofp <16 x i32> undef to <16 x double>
- %v16i64_v16f16 = uitofp <16 x i64> undef to <16 x half>
%v16i64_v16f32 = uitofp <16 x i64> undef to <16 x float>
%v16i64_v16f64 = uitofp <16 x i16> undef to <16 x double>
- %v16i1_v16f16 = uitofp <16 x i1> undef to <16 x half>
%v16i1_v16f32 = uitofp <16 x i1> undef to <16 x float>
%v16i1_v16f64 = uitofp <16 x i1> undef to <16 x double>
- %v32i8_v32f16 = uitofp <32 x i8> undef to <32 x half>
%v32i8_v32f32 = uitofp <32 x i8> undef to <32 x float>
%v32i8_v32f64 = uitofp <32 x i8> undef to <32 x double>
- %v32i16_v32f16 = uitofp <32 x i16> undef to <32 x half>
%v32i16_v32f32 = uitofp <32 x i16> undef to <32 x float>
%v32i16_v32f64 = uitofp <32 x i16> undef to <32 x double>
- %v32i32_v32f16 = uitofp <32 x i32> undef to <32 x half>
%v32i32_v32f32 = uitofp <32 x i32> undef to <32 x float>
%v32i32_v32f64 = uitofp <32 x i32> undef to <32 x double>
- %v32i64_v32f16 = uitofp <32 x i64> undef to <32 x half>
%v32i64_v32f32 = uitofp <32 x i64> undef to <32 x float>
%v32i64_v32f64 = uitofp <32 x i16> undef to <32 x double>
- %v32i1_v32f16 = uitofp <32 x i1> undef to <32 x half>
%v32i1_v32f32 = uitofp <32 x i1> undef to <32 x float>
%v32i1_v32f64 = uitofp <32 x i1> undef to <32 x double>
- %v64i8_v64f16 = uitofp <64 x i8> undef to <64 x half>
%v64i8_v64f32 = uitofp <64 x i8> undef to <64 x float>
%v64i8_v64f64 = uitofp <64 x i8> undef to <64 x double>
- %v64i16_v64f16 = uitofp <64 x i16> undef to <64 x half>
%v64i16_v64f32 = uitofp <64 x i16> undef to <64 x float>
%v64i16_v64f64 = uitofp <64 x i16> undef to <64 x double>
- %v64i32_v64f16 = uitofp <64 x i32> undef to <64 x half>
%v64i32_v64f32 = uitofp <64 x i32> undef to <64 x float>
%v64i32_v64f64 = uitofp <64 x i32> undef to <64 x double>
- %v64i64_v64f16 = uitofp <64 x i64> undef to <64 x half>
%v64i64_v64f32 = uitofp <64 x i64> undef to <64 x float>
%v64i64_v64f64 = uitofp <64 x i16> undef to <64 x double>
- %v64i1_v64f16 = uitofp <64 x i1> undef to <64 x half>
%v64i1_v64f32 = uitofp <64 x i1> undef to <64 x float>
%v64i1_v64f64 = uitofp <64 x i1> undef to <64 x double>
- %v128i8_v128f16 = uitofp <128 x i8> undef to <128 x half>
%v128i8_v128f32 = uitofp <128 x i8> undef to <128 x float>
%v128i8_v128f64 = uitofp <128 x i8> undef to <128 x double>
- %v128i16_v128f16 = uitofp <128 x i16> undef to <128 x half>
%v128i16_v128f32 = uitofp <128 x i16> undef to <128 x float>
%v128i16_v128f64 = uitofp <128 x i16> undef to <128 x double>
- %v128i32_v128f16 = uitofp <128 x i32> undef to <128 x half>
%v128i32_v128f32 = uitofp <128 x i32> undef to <128 x float>
%v128i32_v128f64 = uitofp <128 x i32> undef to <128 x double>
- %v128i64_v128f16 = uitofp <128 x i64> undef to <128 x half>
%v128i64_v128f32 = uitofp <128 x i64> undef to <128 x float>
%v128i64_v128f64 = uitofp <128 x i16> undef to <128 x double>
- %v128i1_v128f16 = uitofp <128 x i1> undef to <128 x half>
%v128i1_v128f32 = uitofp <128 x i1> undef to <128 x float>
%v128i1_v128f64 = uitofp <128 x i1> undef to <128 x double>
- %nxv1i8_nxv1f16 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x half>
%nxv1i8_nxv1f32 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x float>
%nxv1i8_nxv1f64 = uitofp <vscale x 1 x i8> undef to <vscale x 1 x double>
- %nxv1i16_nxv1f16 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x half>
%nxv1i16_nxv1f32 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x float>
%nxv1i16_nxv1f64 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
- %nxv1i32_nxv1f16 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x half>
%nxv1i32_nxv1f32 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x float>
%nxv1i32_nxv1f64 = uitofp <vscale x 1 x i32> undef to <vscale x 1 x double>
- %nxv1i64_nxv1f16 = uitofp <vscale x 1 x i64> undef to <vscale x 1 x half>
%nxv1i64_nxv1f32 = uitofp <vscale x 1 x i64> undef to <vscale x 1 x float>
%nxv1i64_nxv1f64 = uitofp <vscale x 1 x i16> undef to <vscale x 1 x double>
- %nxv1i1_nxv1f16 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x half>
%nxv1i1_nxv1f32 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x float>
%nxv1i1_nxv1f64 = uitofp <vscale x 1 x i1> undef to <vscale x 1 x double>
- %nxv2i8_nxv2f16 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x half>
%nxv2i8_nxv2f32 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x float>
%nxv2i8_nxv2f64 = uitofp <vscale x 2 x i8> undef to <vscale x 2 x double>
- %nxv2i16_nxv2f16 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x half>
%nxv2i16_nxv2f32 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x float>
%nxv2i16_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
- %nxv2i32_nxv2f16 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x half>
%nxv2i32_nxv2f32 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x float>
%nxv2i32_nxv2f64 = uitofp <vscale x 2 x i32> undef to <vscale x 2 x double>
- %nxv2i64_nxv2f16 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x half>
%nxv2i64_nxv2f32 = uitofp <vscale x 2 x i64> undef to <vscale x 2 x float>
%nxv2i64_nxv2f64 = uitofp <vscale x 2 x i16> undef to <vscale x 2 x double>
- %nxv2i1_nxv2f16 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x half>
%nxv2i1_nxv2f32 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x float>
%nxv2i1_nxv2f64 = uitofp <vscale x 2 x i1> undef to <vscale x 2 x double>
- %nxv4i8_nxv4f16 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x half>
%nxv4i8_nxv4f32 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x float>
%nxv4i8_nxv4f64 = uitofp <vscale x 4 x i8> undef to <vscale x 4 x double>
- %nxv4i16_nxv4f16 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x half>
%nxv4i16_nxv4f32 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x float>
%nxv4i16_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
- %nxv4i32_nxv4f16 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x half>
%nxv4i32_nxv4f32 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x float>
%nxv4i32_nxv4f64 = uitofp <vscale x 4 x i32> undef to <vscale x 4 x double>
- %nxv4i64_nxv4f16 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x half>
%nxv4i64_nxv4f32 = uitofp <vscale x 4 x i64> undef to <vscale x 4 x float>
%nxv4i64_nxv4f64 = uitofp <vscale x 4 x i16> undef to <vscale x 4 x double>
- %nxv4i1_nxv4f16 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x half>
%nxv4i1_nxv4f32 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x float>
%nxv4i1_nxv4f64 = uitofp <vscale x 4 x i1> undef to <vscale x 4 x double>
- %nxv8i8_nxv8f16 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x half>
%nxv8i8_nxv8f32 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x float>
%nxv8i8_nxv8f64 = uitofp <vscale x 8 x i8> undef to <vscale x 8 x double>
- %nxv8i16_nxv8f16 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x half>
%nxv8i16_nxv8f32 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x float>
%nxv8i16_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
- %nxv8i32_nxv8f16 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x half>
%nxv8i32_nxv8f32 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x float>
%nxv8i32_nxv8f64 = uitofp <vscale x 8 x i32> undef to <vscale x 8 x double>
- %nxv8i64_nxv8f16 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x half>
%nxv8i64_nxv8f32 = uitofp <vscale x 8 x i64> undef to <vscale x 8 x float>
%nxv8i64_nxv8f64 = uitofp <vscale x 8 x i16> undef to <vscale x 8 x double>
- %nxv8i1_nxv8f16 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x half>
%nxv8i1_nxv8f32 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x float>
%nxv8i1_nxv8f64 = uitofp <vscale x 8 x i1> undef to <vscale x 8 x double>
- %nxv16i8_nxv16f16 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x half>
%nxv16i8_nxv16f32 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x float>
%nxv16i8_nxv16f64 = uitofp <vscale x 16 x i8> undef to <vscale x 16 x double>
- %nxv16i16_nxv16f16 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x half>
%nxv16i16_nxv16f32 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x float>
%nxv16i16_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
- %nxv16i32_nxv16f16 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x half>
%nxv16i32_nxv16f32 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x float>
%nxv16i32_nxv16f64 = uitofp <vscale x 16 x i32> undef to <vscale x 16 x double>
- %nxv16i64_nxv16f16 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x half>
%nxv16i64_nxv16f32 = uitofp <vscale x 16 x i64> undef to <vscale x 16 x float>
%nxv16i64_nxv16f64 = uitofp <vscale x 16 x i16> undef to <vscale x 16 x double>
- %nxv16i1_nxv16f16 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x half>
%nxv16i1_nxv16f32 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x float>
%nxv16i1_nxv16f64 = uitofp <vscale x 16 x i1> undef to <vscale x 16 x double>
- %nxv32i8_nxv32f16 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x half>
%nxv32i8_nxv32f32 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x float>
%nxv32i8_nxv32f64 = uitofp <vscale x 32 x i8> undef to <vscale x 32 x double>
- %nxv32i16_nxv32f16 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x half>
%nxv32i16_nxv32f32 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x float>
%nxv32i16_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
- %nxv32i32_nxv32f16 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x half>
%nxv32i32_nxv32f32 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x float>
%nxv32i32_nxv32f64 = uitofp <vscale x 32 x i32> undef to <vscale x 32 x double>
- %nxv32i64_nxv32f16 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x half>
%nxv32i64_nxv32f32 = uitofp <vscale x 32 x i64> undef to <vscale x 32 x float>
%nxv32i64_nxv32f64 = uitofp <vscale x 32 x i16> undef to <vscale x 32 x double>
- %nxv32i1_nxv32f16 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x half>
%nxv32i1_nxv32f32 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x float>
%nxv32i1_nxv32f64 = uitofp <vscale x 32 x i1> undef to <vscale x 32 x double>
- %nxv64i8_nxv64f16 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x half>
%nxv64i8_nxv64f32 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x float>
%nxv64i8_nxv64f64 = uitofp <vscale x 64 x i8> undef to <vscale x 64 x double>
- %nxv64i16_nxv64f16 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x half>
%nxv64i16_nxv64f32 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x float>
%nxv64i16_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
- %nxv64i32_nxv64f16 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x half>
%nxv64i32_nxv64f32 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x float>
%nxv64i32_nxv64f64 = uitofp <vscale x 64 x i32> undef to <vscale x 64 x double>
- %nxv64i64_nxv64f16 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x half>
%nxv64i64_nxv64f32 = uitofp <vscale x 64 x i64> undef to <vscale x 64 x float>
%nxv64i64_nxv64f64 = uitofp <vscale x 64 x i16> undef to <vscale x 64 x double>
- %nxv64i1_nxv64f16 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x half>
%nxv64i1_nxv64f32 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x float>
%nxv64i1_nxv64f64 = uitofp <vscale x 64 x i1> undef to <vscale x 64 x double>
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