[llvm] [RISCV] Add a MIR pass to reassociate shXadd, add, and slli to form more shXadd. (PR #87544)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 4 15:07:23 PDT 2024
================
@@ -0,0 +1,166 @@
+//===- RISCVOptZba.cpp - MI Zba instruction optimizations -----------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===---------------------------------------------------------------------===//
+//
+// This pass attempts to reassociate expressions like
+// (sh3add Z, (add X, (slli Y, 6)))
+// To
+// (sh3add (sh3add Y, Z), X)
+//
+// This reduces number of instructions needing by spreading the shift amount
+// across to 2 sh3adds. This can be generalized to sh1add/sh2add and other
----------------
topperc wrote:
I meant it can be generalized relative to the specific example in the comment, but I admit that was probably poorly worded.
https://github.com/llvm/llvm-project/pull/87544
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