[llvm] [RISCV] Add a MIR pass to reassociate shXadd, add, and slli to form more shXadd. (PR #87544)

[Philip Reames via llvm-commits]

https://github.com/preames commented:

A bit of context for anyone reading along.

Craig and I spent a bunch of time chatting about related issues last week.  I'm going to continue with a set of patches to try and both generate shNadds more often, and (possibly) restructure how these are handled in DAG combine.

I suggested that Craig land a variant of the original patch (i.e. this one), and that we use that as our baseline for further iteration.  We may end up reversing course here fairly quickly, but I don't see any significant downside to having landed this if that turns out be the case.  

https://github.com/llvm/llvm-project/pull/87544