[llvm] [RISCV][TTI] Scale the cost of intrinsic umin/umax/smin/smax with LMUL (PR #87245)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 1 11:01:48 PDT 2024


================
@@ -810,9 +810,27 @@ RISCVTTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
   case Intrinsic::smin:
   case Intrinsic::smax: {
     auto LT = getTypeLegalizationCost(RetTy);
-    if ((ST->hasVInstructions() && LT.second.isVector()) ||
-        (LT.second.isScalarInteger() && ST->hasStdExtZbb()))
+    if (LT.second.isScalarInteger() && ST->hasStdExtZbb())
       return LT.first;
+
+    if (ST->hasVInstructions() && LT.second.isVector()) {
+      unsigned Op;
+      switch (ICA.getID()) {
+      case Intrinsic::umin:
+        Op = RISCV::VMINU_VV;
----------------
topperc wrote:

Why do we need a different enum value for each possible min/max? Can we just have 1 enum for all 4 possibilities? Then we don't need a switch here.

https://github.com/llvm/llvm-project/pull/87245


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