[llvm] [GISEL] Add G_SPLAT_VECTOR_PARTS to represent 64-bit splat vectors on… (PR #86970)

[Amara Emerson via llvm-commits]

aemerson wrote:

> > Which is the "lower level" representation? SPLAT_VECTOR_PARTS or a SPLAT of G_MERGE? Can we lower SPLAT_VECTOR_PARTS to the merge representation for targets that don't need it?
> 
> I think targets that don't need it can lower to the merge representation. I think it depends on your target which is the lower level representation.
> 
> > I'm also wondering if since only RISCV seems to need this whether we can just make it a RISCV G_ opcode.
> 
> I am okay with this. This way we don't need to worry about other targets needing to lower it. I wonder if in the long run we could remove this opcode and replace with splat patterns of i64 operand. I don't have the bandwidth right now to do this though. Would appreciate the ability to reuse patterns.

You can check `AArch64InstrGISel.td` for examples of where we define our target specific G_ opcodes. That said if you do this please add `RISCV` to the name like `G_RISCV_SPLAT_VECTOR`. We need to rename the AArch64 ones too.

https://github.com/llvm/llvm-project/pull/86970