[llvm] [RISCV][GISEL] IRTranslator for Scalable Vector Store (PR #86699)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 28 06:20:09 PDT 2024
================
@@ -0,0 +1,950 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+v -global-isel -stop-after=irtranslator -verify-machineinstrs < %s | FileCheck -check-prefixes=RV32 %s
+; RUN: llc -mtriple=riscv64 -mattr=+v -global-isel -stop-after=irtranslator -verify-machineinstrs < %s | FileCheck -check-prefixes=RV64 %s
----------------
arsenm wrote:
```suggestion
; RUN: llc -mtriple=riscv32 -mattr=+v -global-isel -stop-after=irtranslator < %s | FileCheck -check-prefixes=RV32 %s
; RUN: llc -mtriple=riscv64 -mattr=+v -global-isel -stop-after=irtranslator < %s | FileCheck -check-prefixes=RV64 %s
```
https://github.com/llvm/llvm-project/pull/86699
More information about the llvm-commits
mailing list