[llvm] Support replacing `add rd, Zero, Zero` with `c.li rd, 0` (PR #86937)

[Mark Goncharov via llvm-commits]

mga-sc wrote:

@wangpc-pp , you are right, we often generate _addi_ with _imm=0_, but writing some optimizations on asm by hands was found this case. Another reason, in the future we might generate _add_ with _zero_ registers. 
So, I think it would not be superfluous to add this replacement. 

https://github.com/llvm/llvm-project/pull/86937