[llvm] [DAGCombiner] Set disjoint flag in add->or and xor->or combines (PR #86925)

[Luke Lau via llvm-commits]

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@@ -2887,8 +2887,11 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
 
   // fold (a+b) -> (a|b) iff a and b share no bits.
   if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) &&
-      DAG.haveNoCommonBitsSet(N0, N1))
-    return DAG.getNode(ISD::OR, DL, VT, N0, N1);
+      DAG.haveNoCommonBitsSet(N0, N1)) {
+    SDNodeFlags Flags;
+    Flags.setDisjoint(true);
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lukel97 wrote:

Yeah, this was gnarly but I just tried to follow what we do for nonneg

https://github.com/llvm/llvm-project/pull/86925