[llvm] [RISCV][GISEL] Legalize, regbank select, and instruction select G_ZEXT, G_SEXT, G_ANYEXT, G_SPLAT_VECTOR, and G_ICMP (PR #85938)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 27 04:57:59 PDT 2024
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================
@@ -141,6 +141,9 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
if (ST.is64Bit()) {
getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
+ .customIf(typeIsLegalBoolVec(1, BoolVecTys, ST))
+ .legalIf(all(typeIsLegalIntOrFPVec(0, IntOrFPVecTys, ST),
+ typeIsLegalIntOrFPVec(1, IntOrFPVecTys, ST)))
----------------
arsenm wrote:
legal operations should be preferred as the first action
https://github.com/llvm/llvm-project/pull/85938
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