[llvm] [RISCV] Teach combineBinOpOfZExt to narrow based on known bits (PR #86680)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 26 21:54:56 PDT 2024


lukel97 wrote:

> > The difficulty I ended up running into is that KnownBits doesn't store enough information about the potential range of the result. I.e. an i64 sub of two zero extended i8 integers will be between 0x00000000000000FF and 0xFFFFFFFFFFFFFE02. So the range can fit into i16, but from KnownBits perspective this is just 0x??????????????. So we can't actually tell what the minimum bit width needed is.
> 
> Shouldn't that be between 0x00000000000000FF and 0xFFFFFFFFFFFFFE01(-255)

Yes, I had originally written 0xFFFFFFFFFFFFFE01 but then confused myself thinking the i8s could be signed and edited my comment

> Does ComputeNumSignBits know?

That seems to be what I was looking for, thanks

https://github.com/llvm/llvm-project/pull/86680


More information about the llvm-commits mailing list