[llvm] d345599 - [GISEL][NFC] Use getElementCount instead of getNumElements in more places
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 26 17:43:00 PDT 2024
Author: Michael Maitland
Date: 2024-03-26T17:41:46-07:00
New Revision: d345599c2851c7ef25d2350244cbfe7cfef36386
URL: https://github.com/llvm/llvm-project/commit/d345599c2851c7ef25d2350244cbfe7cfef36386
DIFF: https://github.com/llvm/llvm-project/commit/d345599c2851c7ef25d2350244cbfe7cfef36386.diff
LOG: [GISEL][NFC] Use getElementCount instead of getNumElements in more places
These cases in particular are done as a precommit to support
legalization, regbank selection, and instruction selection for extends,
splat vectors, and integer compares in #85938.
Added:
Modified:
llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
llvm/lib/CodeGen/LowLevelTypeUtils.cpp
llvm/lib/CodeGen/MachineVerifier.cpp
llvm/lib/CodeGen/RegisterBankInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
index 4ee1793d33d2ca..c9ee35373cd445 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
@@ -154,7 +154,8 @@ static bool mutationIsSane(const LegalizeRule &Rule,
case WidenScalar: {
if (OldTy.isVector()) {
// Number of elements should not change.
- if (!NewTy.isVector() || OldTy.getNumElements() != NewTy.getNumElements())
+ if (!NewTy.isVector() ||
+ OldTy.getElementCount() != NewTy.getElementCount())
return false;
} else {
// Both types must be vectors
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
index f2665e25d195e9..07d4cb5eaa23c8 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
@@ -1160,7 +1160,7 @@ void MachineIRBuilder::validateSelectOp(const LLT ResTy, const LLT TstTy,
else
assert((TstTy.isScalar() ||
(TstTy.isVector() &&
- TstTy.getNumElements() == Op0Ty.getNumElements())) &&
+ TstTy.getElementCount() == Op0Ty.getElementCount())) &&
"type mismatch");
#endif
}
diff --git a/llvm/lib/CodeGen/LowLevelTypeUtils.cpp b/llvm/lib/CodeGen/LowLevelTypeUtils.cpp
index 5caf20add2a11e..1602cd99c383c6 100644
--- a/llvm/lib/CodeGen/LowLevelTypeUtils.cpp
+++ b/llvm/lib/CodeGen/LowLevelTypeUtils.cpp
@@ -51,7 +51,7 @@ MVT llvm::getMVTForLLT(LLT Ty) {
return MVT::getVectorVT(
MVT::getIntegerVT(Ty.getElementType().getSizeInBits()),
- Ty.getNumElements());
+ Ty.getElementCount());
}
EVT llvm::getApproximateEVTForLLT(LLT Ty, const DataLayout &DL,
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 9a1498d4070ed2..e4e05ce9278caf 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1506,7 +1506,8 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
LLT SrcTy = MRI->getType(MI->getOperand(2).getReg());
if ((DstTy.isVector() != SrcTy.isVector()) ||
- (DstTy.isVector() && DstTy.getNumElements() != SrcTy.getNumElements()))
+ (DstTy.isVector() &&
+ DstTy.getElementCount() != SrcTy.getElementCount()))
report("Generic vector icmp/fcmp must preserve number of lanes", MI);
break;
diff --git a/llvm/lib/CodeGen/RegisterBankInfo.cpp b/llvm/lib/CodeGen/RegisterBankInfo.cpp
index 5548430d1b0ae8..72b07eb1902d9b 100644
--- a/llvm/lib/CodeGen/RegisterBankInfo.cpp
+++ b/llvm/lib/CodeGen/RegisterBankInfo.cpp
@@ -484,9 +484,10 @@ void RegisterBankInfo::applyDefaultMapping(const OperandsMapper &OpdMapper) {
// the storage. However, right now we don't necessarily bump all
// the types to storage size. For instance, we can consider
// s16 G_AND legal whereas the storage size is going to be 32.
- assert(OrigTy.getSizeInBits() <= NewTy.getSizeInBits() &&
- "Types with
diff erence size cannot be handled by the default "
- "mapping");
+ assert(
+ TypeSize::isKnownLE(OrigTy.getSizeInBits(), NewTy.getSizeInBits()) &&
+ "Types with
diff erence size cannot be handled by the default "
+ "mapping");
LLVM_DEBUG(dbgs() << "\nChange type of new opd from " << NewTy << " to "
<< OrigTy);
MRI.setType(NewReg, OrigTy);
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