[llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)

[Shilei Tian via llvm-commits]

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@@ -884,3 +786,27 @@ define <2 x i32> @v_sdiv_v2i32_24bit(<2 x i32> %num, <2 x i32> %den) {
   %result = sdiv <2 x i32> %num.mask, %den.mask
   ret <2 x i32> %result
 }
+
+define <2 x i32> @v_sdiv_i32_exact(<2 x i32> %num) {
+; GISEL-LABEL: v_sdiv_i32_exact:
+; GISEL:       ; %bb.0:
+; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GISEL-NEXT:    v_ashrrev_i32_e32 v0, 12, v0
+; GISEL-NEXT:    v_ashrrev_i32_e32 v1, 10, v1
+; GISEL-NEXT:    s_setpc_b64 s[30:31]
+;
+; CGP-LABEL: v_sdiv_i32_exact:
+; CGP:       ; %bb.0:
+; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; CGP-NEXT:    v_ashrrev_i32_e32 v2, 31, v0
+; CGP-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
+; CGP-NEXT:    v_lshrrev_b32_e32 v2, 20, v2
+; CGP-NEXT:    v_lshrrev_b32_e32 v3, 22, v3
+; CGP-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; CGP-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
+; CGP-NEXT:    v_ashrrev_i32_e32 v0, 12, v0
+; CGP-NEXT:    v_ashrrev_i32_e32 v1, 10, v1
+; CGP-NEXT:    s_setpc_b64 s[30:31]
+  %result = sdiv exact <2 x i32> %num, <i32 4096, i32 1024>
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shiltian wrote:

The issue will be fixed in https://github.com/llvm/llvm-project/pull/86712 once this patch is landed.

https://github.com/llvm/llvm-project/pull/83155