[llvm] [SimplifyCFG] Convert switch to cmp/select sequence (PR #82795)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 26 10:16:12 PDT 2024
================
@@ -0,0 +1,341 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -passes=simplifycfg -switch-to-select < %s | FileCheck -check-prefix=ALL %s
+
+define float @constant_single_PHInode(i32 %a, i32 %b, float %c, float %d) {
+; ALL-LABEL: @constant_single_PHInode(
+; ALL-NEXT: .entry:
+; ALL-NEXT: [[TMP0:%.*]] = icmp eq i32 [[A:%.*]], 1
+; ALL-NEXT: br i1 [[TMP0]], label [[SW:%.*]], label [[RETURN:%.*]]
+; ALL: sw:
+; ALL-NEXT: [[SCALE_I0:%.*]] = fmul reassoc nnan nsz arcp contract afn float [[C:%.*]], 2.000000e+00
+; ALL-NEXT: [[DOTI0:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[SCALE_I0]], -1.000000e+00
+; ALL-NEXT: [[DOTI1:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[D:%.*]], -3.000000e+00
+; ALL-NEXT: [[SWITCH_SELECTCMP:%.*]] = icmp eq i32 [[B:%.*]], 0
+; ALL-NEXT: [[SWITCH_SELECTCMP1:%.*]] = icmp eq i32 [[B]], 1
+; ALL-NEXT: [[SWITCH_SELECTCMP2:%.*]] = icmp eq i32 [[B]], 2
+; ALL-NEXT: [[SWITCH_SELECTCMP3:%.*]] = icmp eq i32 [[B]], 3
+; ALL-NEXT: [[SWITCH_SELECT:%.*]] = select i1 [[SWITCH_SELECTCMP3]], float -5.000000e+00, float 4.000000e+00
+; ALL-NEXT: [[SWITCH_SELECT4:%.*]] = select i1 [[SWITCH_SELECTCMP2]], float -1.000000e+00, float [[SWITCH_SELECT]]
+; ALL-NEXT: [[SWITCH_SELECT5:%.*]] = select i1 [[SWITCH_SELECTCMP1]], float 7.000000e+00, float [[SWITCH_SELECT4]]
+; ALL-NEXT: [[SWITCH_SELECT6:%.*]] = select i1 [[SWITCH_SELECTCMP]], float 1.000000e+00, float [[SWITCH_SELECT5]]
+; ALL-NEXT: [[COND:%.*]] = icmp eq i32 [[B]], 2
+; ALL-NEXT: br i1 [[COND]], label [[SW_BB3:%.*]], label [[RETURN]]
+; ALL: sw.bb3:
+; ALL-NEXT: [[TMP1:%.*]] = fneg reassoc nnan nsz arcp contract afn float [[DOTI0]]
+; ALL-NEXT: br label [[RETURN]]
+; ALL: return:
+; ALL-NEXT: [[SAMPLEPOS_1_I0:%.*]] = phi float [ 0.000000e+00, [[DOTENTRY:%.*]] ], [ [[SWITCH_SELECT6]], [[SW_BB3]] ], [ [[SWITCH_SELECT6]], [[SW]] ]
+; ALL-NEXT: ret float [[SAMPLEPOS_1_I0]]
+;
+.entry:
+ %5 = icmp eq i32 %a, 1
+ br i1 %5, label %sw, label %return
+
+sw:
+ %scale.i0 = fmul reassoc nnan nsz arcp contract afn float %c, 2.000000e+00
+ %.i0 = fadd reassoc nnan nsz arcp contract afn float %scale.i0, -1.000000e+00
+ %.i1 = fadd reassoc nnan nsz arcp contract afn float %d, -3.000000e+00
+ switch i32 %b, label %return [
+ i32 0, label %sw.bb1
+ i32 1, label %sw.bb2
+ i32 2, label %sw.bb3
+ i32 3, label %sw.bb4
+ ]
+sw.bb1: ; preds = %sw
+ br label %return
+
+sw.bb2: ; preds = %sw
+ br label %return
+
+sw.bb3: ; preds = %sw
+ %18 = fneg reassoc nnan nsz arcp contract afn float %.i0
+ br label %return
+
+sw.bb4: ; preds = %sw
+ br label %return
+
+return: ; preds = %sw.bb1, %sw.bb2, %sw.bb3, %sw.bb4, %sw, %.entry
+ %samplePos.1.i0 = phi float [ 0.000000e+00, %.entry ], [ -5.000000e+00, %sw.bb4 ], [ -1.000000e+00, %sw.bb3 ], [ 7.000000e+00, %sw.bb2 ], [ 1.000000e+00, %sw.bb1 ], [ 4.000000e+00, %sw ]
+ ret float %samplePos.1.i0
+}
+
+
+define float @constant_multiple_PHInode(i32 %a, i32 %b, float %c, float %d) {
+; ALL-LABEL: @constant_multiple_PHInode(
+; ALL-NEXT: .entry:
+; ALL-NEXT: [[TMP0:%.*]] = icmp eq i32 [[A:%.*]], 1
+; ALL-NEXT: br i1 [[TMP0]], label [[SW:%.*]], label [[RETURN:%.*]]
+; ALL: sw:
+; ALL-NEXT: [[SCALE_I0:%.*]] = fmul reassoc nnan nsz arcp contract afn float [[C:%.*]], 2.000000e+00
+; ALL-NEXT: [[DOTI0:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[SCALE_I0]], -1.000000e+00
+; ALL-NEXT: [[DOTI1:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[D:%.*]], -3.000000e+00
+; ALL-NEXT: [[SWITCH_SELECTCMP:%.*]] = icmp eq i32 [[B:%.*]], 0
+; ALL-NEXT: [[SWITCH_SELECTCMP1:%.*]] = icmp eq i32 [[B]], 1
+; ALL-NEXT: [[SWITCH_SELECTCMP2:%.*]] = icmp eq i32 [[B]], 2
+; ALL-NEXT: [[SWITCH_SELECTCMP3:%.*]] = icmp eq i32 [[B]], 3
+; ALL-NEXT: [[SWITCH_SELECT:%.*]] = select i1 [[SWITCH_SELECTCMP3]], float 4.000000e+00, float 4.000000e+00
+; ALL-NEXT: [[SWITCH_SELECT4:%.*]] = select i1 [[SWITCH_SELECTCMP2]], float -3.000000e+00, float [[SWITCH_SELECT]]
+; ALL-NEXT: [[SWITCH_SELECT5:%.*]] = select i1 [[SWITCH_SELECTCMP1]], float 2.000000e+00, float [[SWITCH_SELECT4]]
+; ALL-NEXT: [[SWITCH_SELECT6:%.*]] = select i1 [[SWITCH_SELECTCMP]], float -1.000000e+00, float [[SWITCH_SELECT5]]
+; ALL-NEXT: [[SWITCH_SELECTCMP7:%.*]] = icmp eq i32 [[B]], 0
+; ALL-NEXT: [[SWITCH_SELECTCMP8:%.*]] = icmp eq i32 [[B]], 1
+; ALL-NEXT: [[SWITCH_SELECTCMP9:%.*]] = icmp eq i32 [[B]], 2
+; ALL-NEXT: [[SWITCH_SELECTCMP10:%.*]] = icmp eq i32 [[B]], 3
+; ALL-NEXT: [[SWITCH_SELECT11:%.*]] = select i1 [[SWITCH_SELECTCMP10]], float 4.000000e+00, float 4.000000e+00
+; ALL-NEXT: [[SWITCH_SELECT12:%.*]] = select i1 [[SWITCH_SELECTCMP9]], float 3.000000e+00, float [[SWITCH_SELECT11]]
+; ALL-NEXT: [[SWITCH_SELECT13:%.*]] = select i1 [[SWITCH_SELECTCMP8]], float 2.000000e+00, float [[SWITCH_SELECT12]]
+; ALL-NEXT: [[SWITCH_SELECT14:%.*]] = select i1 [[SWITCH_SELECTCMP7]], float 1.000000e+00, float [[SWITCH_SELECT13]]
+; ALL-NEXT: [[SWITCH_SELECTCMP15:%.*]] = icmp eq i32 [[B]], 0
+; ALL-NEXT: [[SWITCH_SELECTCMP16:%.*]] = icmp eq i32 [[B]], 1
+; ALL-NEXT: [[SWITCH_SELECTCMP17:%.*]] = icmp eq i32 [[B]], 2
+; ALL-NEXT: [[SWITCH_SELECTCMP18:%.*]] = icmp eq i32 [[B]], 3
+; ALL-NEXT: [[SWITCH_SELECT19:%.*]] = select i1 [[SWITCH_SELECTCMP18]], float -4.000000e+00, float 4.000000e+00
+; ALL-NEXT: [[SWITCH_SELECT20:%.*]] = select i1 [[SWITCH_SELECTCMP17]], float -3.000000e+00, float [[SWITCH_SELECT19]]
+; ALL-NEXT: [[SWITCH_SELECT21:%.*]] = select i1 [[SWITCH_SELECTCMP16]], float -2.000000e+00, float [[SWITCH_SELECT20]]
+; ALL-NEXT: [[SWITCH_SELECT22:%.*]] = select i1 [[SWITCH_SELECTCMP15]], float -1.000000e+00, float [[SWITCH_SELECT21]]
+; ALL-NEXT: br label [[RETURN]]
+; ALL: return:
+; ALL-NEXT: [[SAMPLEPOS_1_I0:%.*]] = phi float [ 0.000000e+00, [[DOTENTRY:%.*]] ], [ [[SWITCH_SELECT14]], [[SW]] ]
+; ALL-NEXT: [[SAMPLEPOS_1_I1:%.*]] = phi float [ 0.000000e+00, [[DOTENTRY]] ], [ [[SWITCH_SELECT22]], [[SW]] ]
+; ALL-NEXT: [[SAMPLEPOS_1_I2:%.*]] = phi float [ 0.000000e+00, [[DOTENTRY]] ], [ [[SWITCH_SELECT6]], [[SW]] ]
+; ALL-NEXT: [[RETVAL1:%.*]] = fadd float [[SAMPLEPOS_1_I0]], [[SAMPLEPOS_1_I1]]
+; ALL-NEXT: [[RETVAL:%.*]] = fadd float [[RETVAL1]], [[SAMPLEPOS_1_I2]]
+; ALL-NEXT: ret float [[RETVAL]]
+;
+.entry:
+ %5 = icmp eq i32 %a, 1
+ br i1 %5, label %sw, label %return
+
+sw:
+ %scale.i0 = fmul reassoc nnan nsz arcp contract afn float %c, 2.000000e+00
+ %.i0 = fadd reassoc nnan nsz arcp contract afn float %scale.i0, -1.000000e+00
+ %.i1 = fadd reassoc nnan nsz arcp contract afn float %d, -3.000000e+00
+ switch i32 %b, label %return [
+ i32 0, label %sw.bb1
+ i32 1, label %sw.bb2
+ i32 2, label %sw.bb3
+ i32 3, label %sw.bb4
+ ]
+sw.bb1: ; preds = %sw
+ br label %return
+
+sw.bb2: ; preds = %sw
+ br label %return
+
+sw.bb3: ; preds = %sw
+ br label %return
+
+sw.bb4: ; preds = %sw
+ br label %return
+
+return: ; preds = %sw.bb1, %sw.bb2, %sw.bb3, %sw.bb4, %sw, %.entry
+ %samplePos.1.i0 = phi float [ 0.000000e+00, %.entry ], [ 4.000000e+00, %sw.bb4 ], [ 3.000000e+00, %sw.bb3 ], [ 2.000000e+00, %sw.bb2 ], [ 1.000000e+00, %sw.bb1 ], [ 4.000000e+00, %sw ]
+ %samplePos.1.i1 = phi float [ 0.000000e+00, %.entry ], [ -4.000000e+00, %sw.bb4 ], [ -3.000000e+00, %sw.bb3 ], [ -2.000000e+00, %sw.bb2 ], [ -1.000000e+00, %sw.bb1 ], [ -4.000000e+00, %sw ]
+ %samplePos.1.i2 = phi float [ 0.000000e+00, %.entry ], [ 4.000000e+00, %sw.bb4 ], [ -3.000000e+00, %sw.bb3 ], [ 2.000000e+00, %sw.bb2 ], [ -1.000000e+00, %sw.bb1 ], [ 4.000000e+00, %sw ]
+ %retVal1 = fadd float %samplePos.1.i0, %samplePos.1.i1
+ %retVal = fadd float %retVal1, %samplePos.1.i2
+ ret float %retVal
+}
+
+define float @partial_constant_single_PHInode(i32 %a, i32 %b, float %c, float %d) {
+; ALL-LABEL: @partial_constant_single_PHInode(
+; ALL-NEXT: .entry:
+; ALL-NEXT: [[TMP0:%.*]] = icmp eq i32 [[A:%.*]], 1
+; ALL-NEXT: br i1 [[TMP0]], label [[SW:%.*]], label [[RETURN:%.*]]
+; ALL: sw:
+; ALL-NEXT: [[SCALE_I0:%.*]] = fmul reassoc nnan nsz arcp contract afn float [[C:%.*]], 2.000000e+00
+; ALL-NEXT: [[DOTI0:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[SCALE_I0]], -1.000000e+00
+; ALL-NEXT: [[DOTI1:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[D:%.*]], -3.000000e+00
+; ALL-NEXT: [[SWITCH_SELECTCMP:%.*]] = icmp eq i32 [[B:%.*]], 0
+; ALL-NEXT: [[SWITCH_SELECTCMP1:%.*]] = icmp eq i32 [[B]], 2
+; ALL-NEXT: [[SWITCH_SELECT:%.*]] = select i1 [[SWITCH_SELECTCMP1]], float -1.000000e+00, float 4.000000e+00
+; ALL-NEXT: [[SWITCH_SELECT2:%.*]] = select i1 [[SWITCH_SELECTCMP]], float 1.000000e+00, float [[SWITCH_SELECT]]
+; ALL-NEXT: switch i32 [[B]], label [[RETURN]] [
+; ALL-NEXT: i32 3, label [[SW_BB4:%.*]]
+; ALL-NEXT: i32 1, label [[SW_BB2:%.*]]
+; ALL-NEXT: i32 2, label [[SW_BB3:%.*]]
+; ALL-NEXT: ]
+; ALL: sw.bb2:
+; ALL-NEXT: br label [[RETURN]]
+; ALL: sw.bb3:
+; ALL-NEXT: [[TMP1:%.*]] = fneg reassoc nnan nsz arcp contract afn float [[DOTI0]]
+; ALL-NEXT: br label [[RETURN]]
+; ALL: sw.bb4:
+; ALL-NEXT: [[TMP2:%.*]] = fneg reassoc nnan nsz arcp contract afn float [[DOTI0]]
+; ALL-NEXT: br label [[RETURN]]
+; ALL: return:
+; ALL-NEXT: [[SAMPLEPOS_1_I0:%.*]] = phi float [ 0.000000e+00, [[DOTENTRY:%.*]] ], [ [[TMP2]], [[SW_BB4]] ], [ [[SWITCH_SELECT2]], [[SW_BB3]] ], [ [[DOTI0]], [[SW_BB2]] ], [ [[SWITCH_SELECT2]], [[SW]] ]
+; ALL-NEXT: ret float [[SAMPLEPOS_1_I0]]
+;
+.entry:
+ %5 = icmp eq i32 %a, 1
+ br i1 %5, label %sw, label %return
+
+sw:
+ %scale.i0 = fmul reassoc nnan nsz arcp contract afn float %c, 2.000000e+00
+ %.i0 = fadd reassoc nnan nsz arcp contract afn float %scale.i0, -1.000000e+00
+ %.i1 = fadd reassoc nnan nsz arcp contract afn float %d, -3.000000e+00
+ switch i32 %b, label %return [
+ i32 0, label %sw.bb1
+ i32 1, label %sw.bb2
+ i32 2, label %sw.bb3
+ i32 3, label %sw.bb4
+ ]
+sw.bb1: ; preds = %sw
+ br label %return
+
+sw.bb2: ; preds = %sw
+ br label %return
+
+sw.bb3: ; preds = %sw
+ %18 = fneg reassoc nnan nsz arcp contract afn float %.i0
+ br label %return
+
+sw.bb4: ; preds = %sw
+ %20 = fneg reassoc nnan nsz arcp contract afn float %.i0
+ br label %return
+return: ; preds = %sw.bb1, %sw.bb2, %sw.bb3, %sw.bb4, %sw, %.entry
+ %samplePos.1.i0 = phi float [ 0.000000e+00, %.entry ], [ %20, %sw.bb4 ], [ -1.000000e+00, %sw.bb3 ], [ %.i0, %sw.bb2 ], [ 1.000000e+00, %sw.bb1 ], [ 4.000000e+00, %sw ]
+ ret float %samplePos.1.i0
+}
+
+define float @partial_constant_multiple_PHInode(i32 %a, i32 %b, float %c, float %d) {
+; ALL-LABEL: @partial_constant_multiple_PHInode(
+; ALL-NEXT: .entry:
+; ALL-NEXT: [[TMP0:%.*]] = icmp eq i32 [[A:%.*]], 1
+; ALL-NEXT: br i1 [[TMP0]], label [[SW:%.*]], label [[RETURN:%.*]]
+; ALL: sw:
+; ALL-NEXT: [[SCALE_I0:%.*]] = fmul reassoc nnan nsz arcp contract afn float [[C:%.*]], 2.000000e+00
+; ALL-NEXT: [[DOTI0:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[SCALE_I0]], -1.000000e+00
+; ALL-NEXT: [[DOTI1:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[D:%.*]], -3.000000e+00
+; ALL-NEXT: [[SWITCH_SELECTCMP:%.*]] = icmp eq i32 [[B:%.*]], 0
+; ALL-NEXT: [[SWITCH_SELECTCMP1:%.*]] = icmp eq i32 [[B]], 1
+; ALL-NEXT: [[SWITCH_SELECTCMP2:%.*]] = icmp eq i32 [[B]], 3
+; ALL-NEXT: [[SWITCH_SELECT:%.*]] = select i1 [[SWITCH_SELECTCMP2]], float -1.000000e+00, float 4.000000e+00
+; ALL-NEXT: [[SWITCH_SELECT3:%.*]] = select i1 [[SWITCH_SELECTCMP1]], float 1.000000e+00, float [[SWITCH_SELECT]]
+; ALL-NEXT: [[SWITCH_SELECT4:%.*]] = select i1 [[SWITCH_SELECTCMP]], float 3.000000e+00, float [[SWITCH_SELECT3]]
+; ALL-NEXT: [[SWITCH_SELECTCMP5:%.*]] = icmp eq i32 [[B]], 0
+; ALL-NEXT: [[SWITCH_SELECTCMP6:%.*]] = icmp eq i32 [[B]], 2
+; ALL-NEXT: [[SWITCH_SELECT7:%.*]] = select i1 [[SWITCH_SELECTCMP6]], float -1.000000e+00, float 4.000000e+00
+; ALL-NEXT: [[SWITCH_SELECT8:%.*]] = select i1 [[SWITCH_SELECTCMP5]], float 1.000000e+00, float [[SWITCH_SELECT7]]
+; ALL-NEXT: [[SWITCH_SELECTCMP9:%.*]] = icmp eq i32 [[B]], 0
+; ALL-NEXT: [[SWITCH_SELECT10:%.*]] = select i1 [[SWITCH_SELECTCMP9]], float 2.000000e+00, float 4.000000e+00
+; ALL-NEXT: switch i32 [[B]], label [[RETURN]] [
+; ALL-NEXT: i32 3, label [[SW_BB4:%.*]]
+; ALL-NEXT: i32 1, label [[SW_BB2:%.*]]
+; ALL-NEXT: i32 2, label [[SW_BB3:%.*]]
+; ALL-NEXT: ]
+; ALL: sw.bb2:
+; ALL-NEXT: br label [[RETURN]]
+; ALL: sw.bb3:
+; ALL-NEXT: [[TMP1:%.*]] = fneg reassoc nnan nsz arcp contract afn float [[DOTI0]]
+; ALL-NEXT: br label [[RETURN]]
+; ALL: sw.bb4:
+; ALL-NEXT: [[TMP2:%.*]] = fneg reassoc nnan nsz arcp contract afn float [[DOTI0]]
+; ALL-NEXT: br label [[RETURN]]
+; ALL: return:
+; ALL-NEXT: [[SAMPLEPOS_1_I0:%.*]] = phi float [ 0.000000e+00, [[DOTENTRY:%.*]] ], [ [[TMP2]], [[SW_BB4]] ], [ [[SWITCH_SELECT8]], [[SW_BB3]] ], [ [[DOTI0]], [[SW_BB2]] ], [ [[SWITCH_SELECT8]], [[SW]] ]
+; ALL-NEXT: [[SAMPLEPOS_1_I1:%.*]] = phi float [ 0.000000e+00, [[DOTENTRY]] ], [ [[DOTI1]], [[SW_BB4]] ], [ [[DOTI1]], [[SW_BB3]] ], [ [[DOTI1]], [[SW_BB2]] ], [ [[SWITCH_SELECT10]], [[SW]] ]
+; ALL-NEXT: [[SAMPLEPOS_1_I2:%.*]] = phi float [ 0.000000e+00, [[DOTENTRY]] ], [ [[SWITCH_SELECT4]], [[SW_BB4]] ], [ [[TMP1]], [[SW_BB3]] ], [ [[SWITCH_SELECT4]], [[SW_BB2]] ], [ [[SWITCH_SELECT4]], [[SW]] ]
+; ALL-NEXT: [[RETVAL1:%.*]] = fadd float [[SAMPLEPOS_1_I0]], [[SAMPLEPOS_1_I1]]
+; ALL-NEXT: [[RETVAL:%.*]] = fadd float [[RETVAL1]], [[SAMPLEPOS_1_I2]]
+; ALL-NEXT: ret float [[RETVAL]]
+;
+.entry:
+ %5 = icmp eq i32 %a, 1
+ br i1 %5, label %sw, label %return
+
+sw:
+ %scale.i0 = fmul reassoc nnan nsz arcp contract afn float %c, 2.000000e+00
+ %.i0 = fadd reassoc nnan nsz arcp contract afn float %scale.i0, -1.000000e+00
+ %.i1 = fadd reassoc nnan nsz arcp contract afn float %d, -3.000000e+00
+ switch i32 %b, label %return [
+ i32 0, label %sw.bb1
+ i32 1, label %sw.bb2
+ i32 2, label %sw.bb3
+ i32 3, label %sw.bb4
+ ]
+sw.bb1: ; preds = %sw
+ br label %return
+
+sw.bb2: ; preds = %sw
+ br label %return
+
+sw.bb3: ; preds = %sw
+ %18 = fneg reassoc nnan nsz arcp contract afn float %.i0
+ br label %return
+
+sw.bb4: ; preds = %sw
+ %20 = fneg reassoc nnan nsz arcp contract afn float %.i0
+ br label %return
+return: ; preds = %sw.bb1, %sw.bb2, %sw.bb3, %sw.bb4, %sw, %.entry
+ %samplePos.1.i0 = phi float [ 0.000000e+00, %.entry ], [ %20, %sw.bb4 ], [ -1.000000e+00, %sw.bb3 ], [ %.i0, %sw.bb2 ], [ 1.000000e+00, %sw.bb1 ], [ 4.000000e+00, %sw ]
+ %samplePos.1.i1 = phi float [ 0.000000e+00, %.entry ], [ %.i1, %sw.bb4 ], [ %.i1, %sw.bb3 ], [ %.i1, %sw.bb2 ], [ 2.000000e+00, %sw.bb1 ], [ 4.000000e+00, %sw ]
+ %samplePos.1.i2 = phi float [ 0.000000e+00, %.entry ], [ -1.000000e+00, %sw.bb4 ], [ %18, %sw.bb3 ], [ 1.000000e+00, %sw.bb2 ], [ 3.000000e+00, %sw.bb1 ], [ 4.000000e+00, %sw ]
+ %retVal1 = fadd float %samplePos.1.i0, %samplePos.1.i1
+ %retVal = fadd float %retVal1, %samplePos.1.i2
+ ret float %retVal
+}
+
+define float @two_instructions_in_bb(i32 %a, i32 %b, float %c, float %d) {
+; ALL-LABEL: @two_instructions_in_bb(
+; ALL-NEXT: .entry:
+; ALL-NEXT: [[TMP0:%.*]] = icmp eq i32 [[A:%.*]], 1
+; ALL-NEXT: br i1 [[TMP0]], label [[SW:%.*]], label [[RETURN:%.*]]
+; ALL: sw:
+; ALL-NEXT: [[SCALE_I0:%.*]] = fmul reassoc nnan nsz arcp contract afn float [[C:%.*]], 2.000000e+00
+; ALL-NEXT: [[DOTI0:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[SCALE_I0]], -1.000000e+00
+; ALL-NEXT: [[DOTI1:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[D:%.*]], -3.000000e+00
+; ALL-NEXT: switch i32 [[B:%.*]], label [[RETURN]] [
+; ALL-NEXT: i32 0, label [[SW_BB1:%.*]]
+; ALL-NEXT: i32 1, label [[SW_BB2:%.*]]
+; ALL-NEXT: i32 2, label [[SW_BB3:%.*]]
+; ALL-NEXT: i32 3, label [[SW_BB4:%.*]]
+; ALL-NEXT: ]
+; ALL: sw.bb1:
+; ALL-NEXT: br label [[RETURN]]
+; ALL: sw.bb2:
+; ALL-NEXT: br label [[RETURN]]
+; ALL: sw.bb3:
+; ALL-NEXT: [[TMP1:%.*]] = fneg reassoc nnan nsz arcp contract afn float [[DOTI0]]
+; ALL-NEXT: br label [[RETURN]]
+; ALL: sw.bb4:
+; ALL-NEXT: [[TMP2:%.*]] = fneg reassoc nnan nsz arcp contract afn float [[DOTI0]]
+; ALL-NEXT: [[TMP3:%.*]] = fneg reassoc nnan nsz arcp contract afn float [[DOTI1]]
+; ALL-NEXT: br label [[RETURN]]
+; ALL: return:
+; ALL-NEXT: [[SAMPLEPOS_1_I0:%.*]] = phi float [ 0.000000e+00, [[DOTENTRY:%.*]] ], [ [[TMP2]], [[SW_BB4]] ], [ -1.000000e+00, [[SW_BB3]] ], [ [[DOTI0]], [[SW_BB2]] ], [ 1.000000e+00, [[SW_BB1]] ], [ 4.000000e+00, [[SW]] ]
+; ALL-NEXT: ret float [[SAMPLEPOS_1_I0]]
+;
+.entry:
+ %5 = icmp eq i32 %a, 1
+ br i1 %5, label %sw, label %return
+
+sw:
+ %scale.i0 = fmul reassoc nnan nsz arcp contract afn float %c, 2.000000e+00
+ %.i0 = fadd reassoc nnan nsz arcp contract afn float %scale.i0, -1.000000e+00
+ %.i1 = fadd reassoc nnan nsz arcp contract afn float %d, -3.000000e+00
+ switch i32 %b, label %return [
+ i32 0, label %sw.bb1
+ i32 1, label %sw.bb2
+ i32 2, label %sw.bb3
+ i32 3, label %sw.bb4
+ ]
+sw.bb1: ; preds = %sw
+ br label %return
+
+sw.bb2: ; preds = %sw
+ br label %return
+
+sw.bb3: ; preds = %sw
+ %18 = fneg reassoc nnan nsz arcp contract afn float %.i0
+ br label %return
+
+sw.bb4: ; preds = %sw
+ %20 = fneg reassoc nnan nsz arcp contract afn float %.i0
+ %21 = fneg reassoc nnan nsz arcp contract afn float %.i1
+ br label %return
+return: ; preds = %sw.bb1, %sw.bb2, %sw.bb3, %sw.bb4, %sw, %.entry
+ %samplePos.1.i0 = phi float [ 0.000000e+00, %.entry ], [ %20, %sw.bb4 ], [ -1.000000e+00, %sw.bb3 ], [ %.i0, %sw.bb2 ], [ 1.000000e+00, %sw.bb1 ], [ 4.000000e+00, %sw ]
+ ret float %samplePos.1.i0
+}
----------------
XChy wrote:
Negative tests? For example,
- No common dest for cases.
- The switch jumps direct into the dest block.
- Loop with switch.
https://github.com/llvm/llvm-project/pull/82795
More information about the llvm-commits
mailing list