[llvm] [RISCV] Teach combineBinOpOfZExt to narrow based on known bits (PR #86680)

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``````````bash
git-clang-format --diff a6b870db091830844431f77eb47aa30fc1d70bed 232dbc9e2becc7bcaff67753168704dccbc82378 -- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 507f5a600f..d3cdb9826f 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -12966,7 +12966,7 @@ static SDValue combineBinOpOfZExt(SDNode *N, SelectionDAG &DAG) {
       !DAG.getTargetLoweringInfo().isTypeLegal(Src1VT))
     return SDValue();
 
-  unsigned HalfBitWidth =  VT.getScalarSizeInBits() / 2;
+  unsigned HalfBitWidth = VT.getScalarSizeInBits() / 2;
   if (Src0VT.getScalarSizeInBits() >= HalfBitWidth) {
     KnownBits Known = DAG.computeKnownBits(Src0);
     if (Known.countMinLeadingZeros() <= HalfBitWidth)

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https://github.com/llvm/llvm-project/pull/86680