[llvm] [RISCV][WIP] Emit code for strcmp for unaligned strings when one stri… (PR #86645)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 26 02:23:53 PDT 2024
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff d1a461dbb2293d9258d400b5426f610bb5191228 2f8f5c14e4e09b983f35edd0978de2b2db6b8191 -- llvm/lib/Target/RISCV/RISCVSelectionDAGTargetInfo.cpp llvm/lib/Target/RISCV/RISCVSelectionDAGTargetInfo.h llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/lib/Target/RISCV/RISCVISelLowering.h llvm/lib/Target/RISCV/RISCVSubtarget.cpp llvm/lib/Target/RISCV/RISCVSubtarget.h
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index b467d6d72e..a353b6849c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -17677,22 +17677,16 @@ static MachineBasicBlock *emitSTRCMPI(MachineInstr &MI, MachineBasicBlock *MBB,
MBBI = ExitMBB->getIterator();
bool NeedToNegateResult = MI.getOperand(3).getImm() == 1;
- Register PHIReg = NeedToNegateResult ?
- MRI.createVirtualRegister(&RISCV::GPRRegClass) :
- MI.getOperand(0).getReg();
+ Register PHIReg = NeedToNegateResult
+ ? MRI.createVirtualRegister(&RISCV::GPRRegClass)
+ : MI.getOperand(0).getReg();
MachineInstrBuilder PHI_MIB =
- BuildMI(*ExitMBB, ExitMBB->begin(), DL, TII.get(RISCV::PHI),
- PHIReg);
+ BuildMI(*ExitMBB, ExitMBB->begin(), DL, TII.get(RISCV::PHI), PHIReg);
if (NeedToNegateResult) {
- BuildMI(
- *ExitMBB,
- ++ExitMBB->begin(),
- DL,
- TII.get(RISCV::SUB),
- MI.getOperand(0).getReg()
- )
- .addReg(RISCV::X0)
- .addReg(PHIReg);
+ BuildMI(*ExitMBB, ++ExitMBB->begin(), DL, TII.get(RISCV::SUB),
+ MI.getOperand(0).getReg())
+ .addReg(RISCV::X0)
+ .addReg(PHIReg);
}
MachineBasicBlock *ReturnNegMBB = MF.CreateMachineBasicBlock(LLVM_BB);
@@ -17708,29 +17702,23 @@ static MachineBasicBlock *emitSTRCMPI(MachineInstr &MI, MachineBasicBlock *MBB,
Register BaseReg = MI.getOperand(1).getReg();
MachineMemOperand &MMO = *MI.memoperands()[0];
- MachineBasicBlock *ReturnLastLoadedByteMBB = MF.CreateMachineBasicBlock(LLVM_BB);
+ MachineBasicBlock *ReturnLastLoadedByteMBB =
+ MF.CreateMachineBasicBlock(LLVM_BB);
MF.insert(MBBI, ReturnLastLoadedByteMBB);
Register LoadedLastByteReg = MRI.createVirtualRegister(&RISCV::GPRRegClass);
- MachineInstr &LoadLastByteMI = *BuildMI(
- *ReturnLastLoadedByteMBB,
- ReturnLastLoadedByteMBB->end(),
- DL,
- TII.get(RISCV::LBU),
- LoadedLastByteReg
- )
- .addReg(BaseReg)
- .addImm(NumOfBytes)
- .cloneMemRefs(MI)
- .getInstr();
+ MachineInstr &LoadLastByteMI =
+ *BuildMI(*ReturnLastLoadedByteMBB, ReturnLastLoadedByteMBB->end(), DL,
+ TII.get(RISCV::LBU), LoadedLastByteReg)
+ .addReg(BaseReg)
+ .addImm(NumOfBytes)
+ .cloneMemRefs(MI)
+ .getInstr();
MachineMemOperand *NewMMO = MF.getMachineMemOperand(
- MMO.getPointerInfo(),
- MachineMemOperand::MOLoad,
- LLT(MVT::i8),
- Align(1)
- );
+ MMO.getPointerInfo(), MachineMemOperand::MOLoad, LLT(MVT::i8), Align(1));
LoadLastByteMI.setMemRefs(MF, {NewMMO});
LoadLastByteMI.memoperands()[0]->setOffset(NumOfBytes);
- BuildMI(*ReturnLastLoadedByteMBB, ReturnLastLoadedByteMBB->end(), DL, TII.get(RISCV::PseudoJump))
+ BuildMI(*ReturnLastLoadedByteMBB, ReturnLastLoadedByteMBB->end(), DL,
+ TII.get(RISCV::PseudoJump))
.addMBB(ExitMBB);
ReturnLastLoadedByteMBB->addSuccessor(ExitMBB);
PHI_MIB.addReg(LoadedLastByteReg).addMBB(ReturnLastLoadedByteMBB);
@@ -17744,7 +17732,8 @@ static MachineBasicBlock *emitSTRCMPI(MachineInstr &MI, MachineBasicBlock *MBB,
}
NewMBBs.push_back(ReturnLastLoadedByteMBB);
- // TODO: Always assume that constant string is second and negate result if needed.
+ // TODO: Always assume that constant string is second and negate result if
+ // needed.
int64_t Offset = 0;
char Byte = Str[0];
MachineBasicBlock::iterator MII = std::next(MI.getIterator());
@@ -17753,17 +17742,15 @@ static MachineBasicBlock *emitSTRCMPI(MachineInstr &MI, MachineBasicBlock *MBB,
auto emitCodeToCheckOneByteEquality = [&] {
Register LoadedByteReg = MRI.createVirtualRegister(&RISCV::GPRRegClass);
- MachineInstr &LoadByteMI = *BuildMI(*CurrMBB, MII, DL, TII.get(RISCV::LBU), LoadedByteReg)
- .addReg(BaseReg)
- .addImm(Offset)
- .cloneMemRefs(MI)
- .getInstr();
- MachineMemOperand *NewMMO = MF.getMachineMemOperand(
- MMO.getPointerInfo(),
- MachineMemOperand::MOLoad,
- LLT(MVT::i8),
- Align(1)
- );
+ MachineInstr &LoadByteMI =
+ *BuildMI(*CurrMBB, MII, DL, TII.get(RISCV::LBU), LoadedByteReg)
+ .addReg(BaseReg)
+ .addImm(Offset)
+ .cloneMemRefs(MI)
+ .getInstr();
+ MachineMemOperand *NewMMO =
+ MF.getMachineMemOperand(MMO.getPointerInfo(), MachineMemOperand::MOLoad,
+ LLT(MVT::i8), Align(1));
LoadByteMI.setMemRefs(MF, {NewMMO});
LoadByteMI.memoperands()[0]->setOffset(Offset);
@@ -17777,9 +17764,11 @@ static MachineBasicBlock *emitSTRCMPI(MachineInstr &MI, MachineBasicBlock *MBB,
CurrMBB->addSuccessor(ReturnNegMBB);
CurrMBB->addSuccessor(CheckBytesEqualMBB);
- MachineBasicBlock::iterator CheckBytesEqualMMBI = CheckBytesEqualMBB->begin();
+ MachineBasicBlock::iterator CheckBytesEqualMMBI =
+ CheckBytesEqualMBB->begin();
Register DiffReg = MRI.createVirtualRegister(&RISCV::GPRRegClass);
- BuildMI(*CheckBytesEqualMBB, CheckBytesEqualMMBI, DL, TII.get(RISCV::ADDI), DiffReg)
+ BuildMI(*CheckBytesEqualMBB, CheckBytesEqualMMBI, DL, TII.get(RISCV::ADDI),
+ DiffReg)
.addReg(LoadedByteReg)
.addImm(-Byte);
diff --git a/llvm/lib/Target/RISCV/RISCVSelectionDAGTargetInfo.cpp b/llvm/lib/Target/RISCV/RISCVSelectionDAGTargetInfo.cpp
index cf217092a5..33e325f11c 100644
--- a/llvm/lib/Target/RISCV/RISCVSelectionDAGTargetInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSelectionDAGTargetInfo.cpp
@@ -23,11 +23,10 @@ using namespace llvm;
#define DEBUG_TYPE "riscv-selectiondag-target-info"
static cl::opt<unsigned> MaxStrcmpSpecializeLength(
- "riscv-max-strcmp-specialize-length",
- cl::Hidden,
- cl::desc("Do not specialize strcmp if the length of constant string is greater or equal to this parameter"),
- cl::init(0)
-);
+ "riscv-max-strcmp-specialize-length", cl::Hidden,
+ cl::desc("Do not specialize strcmp if the length of constant string is "
+ "greater or equal to this parameter"),
+ cl::init(0));
static bool canSpecializeStrcmp(const GlobalAddressSDNode *GA) {
const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
@@ -51,7 +50,8 @@ RISCVSelectionDAGTargetInfo::EmitTargetCodeForStrcmp(
SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1,
SDValue Src2, MachinePointerInfo Op1PtrInfo,
MachinePointerInfo Op2PtrInfo) const {
- // This is the default setting, so exit early if the optimization is turned off.
+ // This is the default setting, so exit early if the optimization is turned
+ // off.
if (MaxStrcmpSpecializeLength == 0)
return std::make_pair(SDValue(), Chain);
@@ -63,11 +63,13 @@ RISCVSelectionDAGTargetInfo::EmitTargetCodeForStrcmp(
bool Src1IsUnaligned = false;
if (const Value *Src1V = dyn_cast_if_present<const Value *>(Op1PtrInfo.V)) {
- Src1IsUnaligned = Src1V->getPointerAlignment(DLayout) < XLenVT.getSizeInBits() / 8;
+ Src1IsUnaligned =
+ Src1V->getPointerAlignment(DLayout) < XLenVT.getSizeInBits() / 8;
}
bool Src2IsUnaligned = false;
if (const Value *Src2V = dyn_cast_if_present<const Value *>(Op2PtrInfo.V)) {
- Src2IsUnaligned = Src2V->getPointerAlignment(DLayout) < XLenVT.getSizeInBits() / 8;
+ Src2IsUnaligned =
+ Src2V->getPointerAlignment(DLayout) < XLenVT.getSizeInBits() / 8;
}
if (!(Src1IsUnaligned || Src2IsUnaligned))
return std::make_pair(SDValue(), Chain);
@@ -96,9 +98,9 @@ RISCVSelectionDAGTargetInfo::EmitTargetCodeForStrcmp(
if (!CStringGA)
return std::make_pair(SDValue(), Chain);
- SDValue TGA = DAG.getTargetGlobalAddress(
- CStringGA->getGlobal(), DL, TLI.getPointerTy(DLayout), 0,
- CStringGA->getTargetFlags());
+ SDValue TGA = DAG.getTargetGlobalAddress(CStringGA->getGlobal(), DL,
+ TLI.getPointerTy(DLayout), 0,
+ CStringGA->getTargetFlags());
SDValue Str1 = TGA;
SDValue Str2 = Other;
@@ -107,20 +109,11 @@ RISCVSelectionDAGTargetInfo::EmitTargetCodeForStrcmp(
MachineFunction &MF = DAG.getMachineFunction();
MachineMemOperand *MMO = MF.getMachineMemOperand(
- MPI,
- MachineMemOperand::MOLoad,
- LLT(MVT::i8),
- Align(1)
- );
+ MPI, MachineMemOperand::MOLoad, LLT(MVT::i8), Align(1));
// TODO: what should be the MemVT?
SDValue STRCMPNode = DAG.getMemIntrinsicNode(
- RISCVISD::STRCMP,
- DL,
- DAG.getVTList(XLenVT, MVT::Other),
- {Chain, Str1, Str2},
- MVT::i8,
- MMO
- );
+ RISCVISD::STRCMP, DL, DAG.getVTList(XLenVT, MVT::Other),
+ {Chain, Str1, Str2}, MVT::i8, MMO);
SDValue ChainOut = STRCMPNode.getValue(1);
return std::make_pair(STRCMPNode, ChainOut);
``````````
</details>
https://github.com/llvm/llvm-project/pull/86645
More information about the llvm-commits
mailing list