[llvm] [BOLT] Fix boltedcollection and no_lbr order in fdata writer and parser (PR #86501)

[via llvm-commits]

zct wrote:

@aaupov Here are the test cases
We can use any source code to reproduce, and I've constructed a simple use case here

https://pastebin.com/5uJ5kg8k

First we compile a BOLT optimized binary(bolt_1) profile use no_lbr and enable BAT model 
```
perf record -e cycles:up ./a.out
perf2bolt --nl -p perf.data -o perf.fdata ./a.out
llvm-bolt ./a.out -o bolt_1 -data perf.fdata  -reorder-blocks=ext-tsp -reorder-functions=hfsort+  -update-debug-sections -enable-bat
```

Then we use the profile collected from the bolt_1 and perform the second optimization, the error has occurred
```
perf record -e cycles:up ./bolt_1
perf2bolt --nl -p perf.data -o perf.fdata_2 ./bolt_1
llvm-bolt ./a.out -o bolt_2 -data perf.fdata_2  -reorder-blocks=ext-tsp -reorder-functions=hfsort+  -update-debug-sections -enable-bat

```
The contents of file perf.fdata_2

```
boltedcollection
no_lbr cycles:up:
1 _ZN9__gnu_cxxneIPiSt6vectorIiSaIiEEEEbRKNS_17__normal_iteratorIT_T0_EESA_ 36 1
1 _ZNK9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEmiEl 39 1
1 _ZNSt6vectorIiSaIiEE4backEv 15 2
1 _ZNSt6vectorIiSaIiEE4backEv 4 1v

```

 llvm-bolt errors
```
BOLT-INFO: shared object or position-independent executable detected
BOLT-INFO: Target architecture: x86_64
BOLT-INFO: BOLT version: e19b7dc36bc047b9eb72078d034596be766da350
BOLT-INFO: first alloc address is 0x0
BOLT-INFO: creating new program header table at address 0x200000, offset 0x200000
BOLT-INFO: enabling relocation mode
BOLT-INFO: enabling lite mode
BOLT-INFO: pre-processing profile using branch profile reader
ERROR: no valid profile data found
BOLT-ERROR: 'cannot pre-process profile': Input/output error.

```

The reason is what I said at the beginning about the order problem







https://github.com/llvm/llvm-project/pull/86501