[llvm] [AArch64][GlobalISel] Legalization for small anyext/sext/zext (PR #86438)

[Amara Emerson via llvm-commits]

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@@ -611,7 +611,9 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
                Query.Types[0].isVector() &&
                (Query.Types[1].getScalarSizeInBits() == 8 ||
                 Query.Types[1].getScalarSizeInBits() == 16);
-      });
+      })
+      .clampMinNumElements(1, s8, 8)
+      .clampMinNumElements(1, s16, 4);
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aemerson wrote:

SGTM. At some point we might want to think about introducing some meta-rules for higher level expressions of legalization strategies.

https://github.com/llvm/llvm-project/pull/86438