[llvm] [AArch64][GlobalISel] Legalization for small anyext/sext/zext (PR #86438)

[David Green via llvm-commits]

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@@ -611,7 +611,9 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
                Query.Types[0].isVector() &&
                (Query.Types[1].getScalarSizeInBits() == 8 ||
                 Query.Types[1].getScalarSizeInBits() == 16);
-      });
+      })
+      .clampMinNumElements(1, s8, 8)
+      .clampMinNumElements(1, s16, 4);
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davemgreen wrote:

I think the idea was (it was for trunc at least), that we clamp to the largest size above, split using lower if the input size is > 2* output size, and then clamp the min size. I'm not sure this is perfect at the mo, but it hopefully stops us from jumping back and forth between smaller and larger vector sizes.

https://github.com/llvm/llvm-project/pull/86438