[llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads (PR #84965)

[Michael Maitland via llvm-commits]

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@@ -220,7 +220,8 @@ struct TypePairAndMemDesc {
            Align >= Other.Align &&
            // FIXME: This perhaps should be stricter, but the current legality
            // rules are written only considering the size.
-           MemTy.getSizeInBits() == Other.MemTy.getSizeInBits();
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michaelmaitland wrote:

If you have an s8 its type size in bits will be `(ElementCount::Fixed(1), 8 bits)` If you have an nxv2s8 its type size in bits will be `(ElementCount::Sclable(2), 8)`. `(ElementCount::Fixed(1), 8) != (ElementCount::Sclable(2), 8)`

https://github.com/llvm/llvm-project/pull/84965