[llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads (PR #84965)

Michael Maitland via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 25 09:36:43 PDT 2024


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@@ -3330,8 +3330,12 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerLoad(GAnyLoad &LoadMI) {
   LLT MemTy = MMO.getMemoryType();
   MachineFunction &MF = MIRBuilder.getMF();
 
-  unsigned MemSizeInBits = MemTy.getSizeInBits();
-  unsigned MemStoreSizeInBits = 8 * MemTy.getSizeInBytes();
+  unsigned MemSizeInBits = MemTy.isScalable()
+                               ? MemTy.getSizeInBits().getKnownMinValue()
+                               : MemTy.getSizeInBits();
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michaelmaitland wrote:

I'm not sure that you need to do this. Can't you say `unsigned MemSizeInBits = MemTy.getSizeInBits().getKnownMinValue()`? When the vector is fixed `getKnownMinValue` is implicitly called on `MemTy.getSizeInBits()` to convert to unsigned.

https://github.com/llvm/llvm-project/pull/84965


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