[llvm] [Target][RISCV] Add HwMode support to subregister index size/offset. (PR #86368)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 24 23:29:55 PDT 2024
================
@@ -1399,28 +1406,47 @@ CodeGenSubRegIndex *CodeGenRegBank::getConcatSubRegIndex(
// None exists, synthesize one.
std::string Name = Parts.front()->getName();
- // Determine whether all parts are contiguous.
- bool IsContinuous = true;
- unsigned Size = Parts.front()->Size;
- unsigned LastOffset = Parts.front()->Offset;
- unsigned LastSize = Parts.front()->Size;
const unsigned UnknownSize = (uint16_t)-1;
+
for (unsigned i = 1, e = Parts.size(); i != e; ++i) {
Name += '_';
Name += Parts[i]->getName();
- if (Size == UnknownSize || Parts[i]->Size == UnknownSize)
- Size = UnknownSize;
- else
- Size += Parts[i]->Size;
- if (LastSize == UnknownSize || Parts[i]->Offset != (LastOffset + LastSize))
- IsContinuous = false;
- LastOffset = Parts[i]->Offset;
- LastSize = Parts[i]->Size;
}
+
Idx = createSubRegIndex(Name, Parts.front()->getNamespace());
- Idx->Size = Size;
- Idx->Offset = IsContinuous ? Parts.front()->Offset : -1;
Idx->ConcatenationOf.assign(Parts.begin(), Parts.end());
+
+ unsigned NumModes = CGH.getNumModeIds();
+ for (unsigned M = 0; M < NumModes; ++M) {
+ const CodeGenSubRegIndex *Part = Parts.front();
+
+ // Determine whether all parts are contiguous.
+ bool IsContinuous = true;
+ const SubRegRange &FirstPartRange = Part->Range.get(M);
+ unsigned Size = FirstPartRange.Size;
+ unsigned LastOffset = FirstPartRange.Offset;
+ unsigned LastSize = FirstPartRange.Size;
+
+ for (unsigned i = 1, e = Parts.size(); i != e; ++i) {
+ Part = Parts[i];
+ Name += '_';
+ Name += Part->getName();
+
+ const SubRegRange &PartRange = Part->Range.get(M);
----------------
topperc wrote:
`Range.get(M)` will return the value from the DefaultMode if the mode isn't present.
https://github.com/llvm/llvm-project/pull/86368
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