[llvm] Only check assertions that were meant to apply to the normal case of non-splat vector SREM expansion when we aren't hitting the special case. (PR #86238)

[Owen Anderson via llvm-commits]

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@@ -0,0 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+;RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck %s
+
+define i32 @f(i1 %0) {
+; CHECK-LABEL: f:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov w0, #1 // =0x1
+; CHECK-NEXT:    ret
+  %new0 = srem i1 %0, true
+  %last = zext i1 %new0 to i32
+  %2 = icmp ne i32 %last, 0
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resistor wrote:

Done

https://github.com/llvm/llvm-project/pull/86238