[llvm] [CodeGen][MRI] Introduce synthetic register classes (PR #86006)

[Yashwant Singh via llvm-commits]

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@@ -650,6 +654,31 @@ void MachineRegisterInfo::setCalleeSavedRegs(ArrayRef<MCPhysReg> CSRs) {
   IsUpdatedCSRsInitialized = true;
 }
 
+void MachineRegisterInfo::initializeRegClassSyntheticInfo() {
+  const TargetRegisterInfo *TRI = getTargetRegisterInfo();
+
+  RegClassSyntheticInfo.resize(TRI->getNumRegClasses());
+  for (const TargetRegisterClass *RC : TRI->regclasses()) {
+    if (RC->isSynthetic())
+      RegClassSyntheticInfo.set(RC->getID());
+  }
+}
+
+void MachineRegisterInfo::changeSyntheticInfoForRC(
+    const TargetRegisterClass *RC, bool Value) {
+  assert(RC->isSynthetic() && "Regclasses can be enabled/disabled dynamically "
+                              "only if marked synthetic.");
+
+  if (Value)
+    RegClassSyntheticInfo.set(RC->getID());
+  else
+    RegClassSyntheticInfo.reset(RC->getID());
+}
+
+bool MachineRegisterInfo::isEnabled(const TargetRegisterClass *RC) const {
+  return !RegClassSyntheticInfo.test(RC->getID());
+}
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yashssh wrote:

These functions feel out of place in this PR, no one is calling them, they aren't being tested. I haven't looked at the rest of the PRs yet. 1) Can you tell more about how they will be used? 2) Can there be unittests for them here?

https://github.com/llvm/llvm-project/pull/86006