[llvm] [AIX][TLS] Produce a faster local-exec access sequence for the "aix-small-tls" global variable attribute (PR #83053)

zhijian lin via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 22 12:11:34 PDT 2024


================
@@ -0,0 +1,121 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc  -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
+; RUN:      -mtriple powerpc64-ibm-aix-xcoff < %s \
+; RUN:      | FileCheck %s --check-prefix=CHECK-SMALLCM64
+; RUN: llc  -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
+; RUN:      -mtriple powerpc64-ibm-aix-xcoff --code-model=large \
+; RUN:      < %s | FileCheck %s --check-prefix=CHECK-LARGECM64
+
+ at mySmallTLS = thread_local(localexec) global [7800 x i64] zeroinitializer, align 8 #0
+ at mySmallTLS2 = thread_local(localexec) global [3000 x i64] zeroinitializer, align 8 #0
+ at mySmallTLS3 = thread_local(localexec) global [3000 x i64] zeroinitializer, align 8
+declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
+
+; All accesses use a "faster" local-exec sequence directly off the thread pointer,
+; except for mySmallTLS, as this variable is over the 32KB size limit.
+define i64 @StoreLargeAccess1() #1 {
+; CHECK-SMALLCM64-LABEL: StoreLargeAccess1:
+; CHECK-SMALLCM64:       # %bb.0: # %entry
+; CHECK-SMALLCM64-NEXT:    ld r3, L..C0(r2) # target-flags(ppc-tprel) @mySmallTLS
+; CHECK-SMALLCM64-NEXT:    li r4, 0
+; CHECK-SMALLCM64-NEXT:    li r5, 23
+; CHECK-SMALLCM64-NEXT:    ori r4, r4, 53328
+; CHECK-SMALLCM64-NEXT:    add r3, r13, r3
+; CHECK-SMALLCM64-NEXT:    stdx r5, r3, r4
+; CHECK-SMALLCM64-NEXT:    li r3, 55
+; CHECK-SMALLCM64-NEXT:    li r4, 64
+; CHECK-SMALLCM64-NEXT:    std r3, (mySmallTLS2[TL]@le+696)-65536(r13)
+; CHECK-SMALLCM64-NEXT:    li r3, 142
+; CHECK-SMALLCM64-NEXT:    std r4, (mySmallTLS3[TL]@le+20000)-131072(r13)
+; CHECK-SMALLCM64-NEXT:    blr
+;
+; CHECK-LARGECM64-LABEL: StoreLargeAccess1:
+; CHECK-LARGECM64:       # %bb.0: # %entry
+; CHECK-LARGECM64-NEXT:    addis r3, L..C0 at u(r2)
+; CHECK-LARGECM64-NEXT:    li r4, 0
----------------
diggerlin wrote:

common problem for all test case. 
for the CHECK-LARGECM64 and CHECK-SMALLCM64  

the only different is 
```
CHECK-LARGECM64-NEXT:    addis r3, L..C0 at u(r2)
; CHECK-LARGECM64-NEXT:    li r4, 0
; CHECK-LARGECM64-NEXT:    li r5, 23
; CHECK-LARGECM64-NEXT:    ld r3, L..C0 at l(r3)
```

and 

```
CHECK-SMALLCM64:       # %bb.0: # %entry
; CHECK-SMALLCM64-NEXT:    ld r3, L..C0(r2) # target-flags(ppc-tprel) @mySmallTLS
; CHECK-SMALLCM64-NEXT:    li r4, 0
; CHECK-SMALLCM64-NEXT:    li r5, 23
```

others are same ,

can you try [ick the common part out and 
--check-prefix=CHECK-SMALLCM64,COMMON 
 --check-prefix=CHECK-LARGECM64,COMMON 

https://github.com/llvm/llvm-project/pull/83053


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