[llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)

[Jun Wang via llvm-commits]

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@@ -127,10 +130,9 @@ struct AMDGPUIncomingArgHandler : public CallLowering::IncomingValueHandler {
       unsigned CopyToBits = 32;
 
       // When function return type is i1, it may be in a 64b register.
-      if (VA.getLocVT() == MVT::i1) {
-        if (MIRBuilder.getMF().getSubtarget<GCNSubtarget>().isWave64())
-          CopyToBits = 64;
-      }
+      if (VA.getLocVT() == MVT::i1 &&
+          MIRBuilder.getMF().getSubtarget<GCNSubtarget>().isWave64())
+        CopyToBits = 64;
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jwanggit86 wrote:

Done.

https://github.com/llvm/llvm-project/pull/72461