[llvm] [AArch64] Clear kill flags when removing FMOVDr. (PR #86308)
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Fri Mar 22 09:40:59 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-aarch64
Author: David Green (davemgreen)
<details>
<summary>Changes</summary>
The uses of OldDef/NewDef may not be killed in the same place they previously were after they are replaced, and so need to be cleared.
---
Full diff: https://github.com/llvm/llvm-project/pull/86308.diff
2 Files Affected:
- (modified) llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp (+3-1)
- (added) llvm/test/CodeGen/AArch64/peephole-movd.mir (+60)
``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp b/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
index 6865850cf04feb..22da7ddef98a2a 100644
--- a/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
@@ -680,9 +680,11 @@ bool AArch64MIPeepholeOpt::visitFMOVDr(MachineInstr &MI) {
// Let's remove MIs for high 64-bits.
Register OldDef = MI.getOperand(0).getReg();
Register NewDef = MI.getOperand(1).getReg();
+ LLVM_DEBUG(dbgs() << "Removing: " << MI << "\n");
+ MRI->clearKillFlags(OldDef);
+ MRI->clearKillFlags(NewDef);
MRI->constrainRegClass(NewDef, MRI->getRegClass(OldDef));
MRI->replaceRegWith(OldDef, NewDef);
- LLVM_DEBUG(dbgs() << "Removed: " << MI << "\n");
MI.eraseFromParent();
return true;
diff --git a/llvm/test/CodeGen/AArch64/peephole-movd.mir b/llvm/test/CodeGen/AArch64/peephole-movd.mir
new file mode 100644
index 00000000000000..bd7f0ab3f044e7
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/peephole-movd.mir
@@ -0,0 +1,60 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -run-pass=aarch64-mi-peephole-opt -o - -mtriple=aarch64-unknown-linux -verify-machineinstrs %s | FileCheck %s
+
+---
+name: remove_kill_flags
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $w0
+ ; CHECK-LABEL: name: remove_kill_flags
+ ; CHECK: liveins: $w0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[MOVIv2d_ns:%[0-9]+]]:fpr128 = MOVIv2d_ns 0
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY [[MOVIv2d_ns]].dsub
+ ; CHECK-NEXT: [[UQSHLv8i8_shift:%[0-9]+]]:fpr64 = UQSHLv8i8_shift killed [[COPY]], 1
+ ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr128 = SUBREG_TO_REG 0, [[UQSHLv8i8_shift]], %subreg.dsub
+ ; CHECK-NEXT: [[TBLv8i8One:%[0-9]+]]:fpr64 = TBLv8i8One killed [[SUBREG_TO_REG]], [[UQSHLv8i8_shift]]
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF
+ ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[UQSHLv8i8_shift]], %subreg.dsub
+ ; CHECK-NEXT: RET_ReallyLR implicit $w0
+ %0:fpr128 = MOVIv2d_ns 0
+ %1:fpr64 = COPY %0.dsub:fpr128
+ %2:fpr64 = UQSHLv8i8_shift killed %1:fpr64, 1
+ %3:fpr64 = FMOVDr %2:fpr64
+ %4:fpr128 = SUBREG_TO_REG 0, killed %3:fpr64, %subreg.dsub
+ %5:fpr64 = TBLv8i8One killed %4:fpr128, %2:fpr64
+ %7:fpr128 = IMPLICIT_DEF
+ %6:fpr128 = INSERT_SUBREG %7:fpr128, killed %2:fpr64, %subreg.dsub
+ RET_ReallyLR implicit $w0
+...
+---
+name: remove_kill_flags2
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $w0
+ ; CHECK-LABEL: name: remove_kill_flags2
+ ; CHECK: liveins: $w0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[MOVIv2d_ns:%[0-9]+]]:fpr128 = MOVIv2d_ns 0
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY [[MOVIv2d_ns]].dsub
+ ; CHECK-NEXT: [[UQSHLv8i8_shift:%[0-9]+]]:fpr64 = UQSHLv8i8_shift killed [[COPY]], 1
+ ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr128 = SUBREG_TO_REG 0, [[UQSHLv8i8_shift]], %subreg.dsub
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF
+ ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[UQSHLv8i8_shift]], %subreg.dsub
+ ; CHECK-NEXT: [[DEF1:%[0-9]+]]:fpr128 = IMPLICIT_DEF
+ ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF1]], [[UQSHLv8i8_shift]], %subreg.dsub
+ ; CHECK-NEXT: RET_ReallyLR implicit $w0
+ %0:fpr128 = MOVIv2d_ns 0
+ %1:fpr64 = COPY %0.dsub:fpr128
+ %2:fpr64 = UQSHLv8i8_shift killed %1:fpr64, 1
+ %3:fpr64 = FMOVDr %2:fpr64
+ %4:fpr128 = SUBREG_TO_REG 0, %3:fpr64, %subreg.dsub
+ %7:fpr128 = IMPLICIT_DEF
+ %6:fpr128 = INSERT_SUBREG %7:fpr128, killed %2:fpr64, %subreg.dsub
+ %9:fpr128 = IMPLICIT_DEF
+ %8:fpr128 = INSERT_SUBREG %9:fpr128, killed %3:fpr64, %subreg.dsub
+ RET_ReallyLR implicit $w0
+...
+
``````````
</details>
https://github.com/llvm/llvm-project/pull/86308
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