[llvm] Match fixed width ISD::AVGFLOORS + ISD::AVGCEILS patterns (PR #86222)
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llvm-commits at lists.llvm.org
Fri Mar 22 04:58:37 PDT 2024
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@@ -2529,18 +2529,23 @@ static SDValue foldAddSubBoolOfMaskedVal(SDNode *N, SelectionDAG &DAG) {
return DAG.getNode(IsAdd ? ISD::SUB : ISD::ADD, DL, VT, C1, LowBit);
}
-// Attempt to form avgceilu(A, B) from (A | B) - ((A ^ B) >> 1)
-static SDValue combineFixedwidthToAVGCEILU(SDNode *N, SelectionDAG &DAG) {
+// Attempt to form avgceil(A, B) from (A | B) - ((A ^ B) >> 1)
+static SDValue combineFixedwidthToAVGCEIL(SDNode *N, SelectionDAG &DAG) {
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
SDValue N0 = N->getOperand(0);
EVT VT = N0.getValueType();
SDLoc DL(N);
- if (TLI.isOperationLegal(ISD::AVGCEILU, VT)) {
+ if (TLI.isOperationLegal(ISD::AVGCEILU, VT) ||
+ TLI.isOperationLegal(ISD::AVGCEILS, VT)) {
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houndlord wrote:
Ah, ok, actually my intent was simply avoid duplication of code, but it seems to be necessary.
https://github.com/llvm/llvm-project/pull/86222
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