[llvm] [NewPM][NVPTX] Add NVPTXPassRegistry.def (PR #86246)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 21 22:03:33 PDT 2024
https://github.com/paperchalice created https://github.com/llvm/llvm-project/pull/86246
Prepare for dag-isel migration.
>From 474f81927a50421fa86f0fb6b74e54193dc61d75 Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Fri, 22 Mar 2024 13:02:49 +0800
Subject: [PATCH] [NewPM][NVPTX] Add NVPTXPassRegistry.def Prepare for dag-isel
migration.
---
llvm/lib/Target/NVPTX/NVPTXPassRegistry.def | 40 +++++++++++++++++++
llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 41 +-------------------
2 files changed, 42 insertions(+), 39 deletions(-)
create mode 100644 llvm/lib/Target/NVPTX/NVPTXPassRegistry.def
diff --git a/llvm/lib/Target/NVPTX/NVPTXPassRegistry.def b/llvm/lib/Target/NVPTX/NVPTXPassRegistry.def
new file mode 100644
index 00000000000000..6ff15ab6f13c44
--- /dev/null
+++ b/llvm/lib/Target/NVPTX/NVPTXPassRegistry.def
@@ -0,0 +1,40 @@
+//===- NVPTXPassRegistry.def - Registry of NVPTX passes ---------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file is used as the registry of passes that are part of the
+// NVPTX backend.
+//
+//===----------------------------------------------------------------------===//
+
+// NOTE: NO INCLUDE GUARD DESIRED!
+
+#ifndef MODULE_PASS
+#define MODULE_PASS(NAME, CREATE_PASS)
+#endif
+MODULE_PASS("generic-to-nvvm", GenericToNVVMPass())
+MODULE_PASS("nvptx-lower-ctor-dtor", NVPTXCtorDtorLoweringPass())
+#undef MODULE_PASS
+
+#ifndef FUNCTION_ANALYSIS
+#define FUNCTION_ANALYSIS(NAME, CREATE_PASS)
+#endif
+
+#ifndef FUNCTION_ALIAS_ANALYSIS
+#define FUNCTION_ALIAS_ANALYSIS(NAME, CREATE_PASS) \
+ FUNCTION_ANALYSIS(NAME, CREATE_PASS)
+#endif
+FUNCTION_ALIAS_ANALYSIS("nvptx-aa", NVPTXAA())
+#undef FUNCTION_ALIAS_ANALYSIS
+#undef FUNCTION_ANALYSIS
+
+#ifndef FUNCTION_PASS
+#define FUNCTION_PASS(NAME, CREATE_PASS)
+#endif
+FUNCTION_PASS("nvvm-intr-range", NVVMIntrRangePass())
+FUNCTION_PASS("nvvm-reflect", NVVMReflectPass())
+#undef FUNCTION_PASS
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
index 69d4596f7843e4..78f48652c9920f 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -227,45 +227,8 @@ void NVPTXTargetMachine::registerDefaultAliasAnalyses(AAManager &AAM) {
void NVPTXTargetMachine::registerPassBuilderCallbacks(
PassBuilder &PB, bool PopulateClassToPassNames) {
- PB.registerPipelineParsingCallback(
- [](StringRef PassName, FunctionPassManager &PM,
- ArrayRef<PassBuilder::PipelineElement>) {
- if (PassName == "nvvm-reflect") {
- PM.addPass(NVVMReflectPass());
- return true;
- }
- if (PassName == "nvvm-intr-range") {
- PM.addPass(NVVMIntrRangePass());
- return true;
- }
- return false;
- });
-
- PB.registerAnalysisRegistrationCallback([](FunctionAnalysisManager &FAM) {
- FAM.registerPass([&] { return NVPTXAA(); });
- });
-
- PB.registerParseAACallback([](StringRef AAName, AAManager &AAM) {
- if (AAName == "nvptx-aa") {
- AAM.registerFunctionAnalysis<NVPTXAA>();
- return true;
- }
- return false;
- });
-
- PB.registerPipelineParsingCallback(
- [](StringRef PassName, ModulePassManager &PM,
- ArrayRef<PassBuilder::PipelineElement>) {
- if (PassName == "nvptx-lower-ctor-dtor") {
- PM.addPass(NVPTXCtorDtorLoweringPass());
- return true;
- }
- if (PassName == "generic-to-nvvm") {
- PM.addPass(GenericToNVVMPass());
- return true;
- }
- return false;
- });
+#define GET_PASS_REGISTRY "NVPTXPassRegistry.def"
+#include "llvm/Passes/TargetPassRegistry.inc"
PB.registerPipelineStartEPCallback(
[this](ModulePassManager &PM, OptimizationLevel Level) {
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